an8032 Panasonic Corporation of North America, an8032 Datasheet - Page 12

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an8032

Manufacturer Part Number
an8032
Description
Active Filter Control Ic
Manufacturer
Panasonic Corporation of North America
Datasheet

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AN8032
12
[2] Operation description (continued)
1. Normal control (continued)
Application Notes (continued)
3) Description of each function (continued)
(4) EI/EO
(5) V
amplifier's inverted input, and the temperature-compensated reference voltage (2.5 V typical) is input as
the noninverted input. The error amplifier amplifies the error amount between the output voltage, and the
reference voltage and outputs to the multiplier. The resistor between the EI and EO is used for determin-
ing the gain of error amplifier.
EI, if an attempt is made to use a small-sized resistor for suppressing the dissipation, its resistance value
becomes high because of the high output voltage. For this reason, note that if the capacitance inserted
between the EI and EO for phase compensation is large, the delay element between it and the resistance-
divider of high resistance becomes large, so that the characteristics at the time of sudden change of load
(overshoot or undershoot) is degraded.
oscillation can be prevented.
directly driven. Since the peak output current is 1 A, the TO-220 class power MOSFET can be driven.
For the TOP-3 class, the buffer circuit should be added outside because its capability is not sufficient for
that class.
drain and gates at the time of turn-off and this causes malfunction in some cases. Therefore, the Schottky
barrier diode should be inserted between the V
OUT
The resisitance-devided voltage of the active filter output is input to the EI. The EI is the error
As for the resistance-dividing for decreasing the active filter's output voltage to the input D-range of
Therefore, as the value for phase compensation capacitor, select the minimum value with which the
For the drive circuit, the AN8032 employs the totem pole type by which the power MOSFET can be
The power MOSFET momentarily swings to minus due to the parasitic capacitance between the
To multiplier
Resistor determining the gain
PV
V
GND
OUT
CC
Error amplifier
Parasitic
capacitance
Figure 8.
V
Figure 7. EI/EO terminal description
G
Reference voltage
(2.5 V typ.)
V
OUT
V
terminal description
D
Phase compensation capacitor
OUT
4
and GND if necessary.
EI
MOSFET
Power
V
V
D
G
0 V
0 V
Capacitive coupling
Swing to negative voltage
SBD
Off
Voltage Regulators
Output
On

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