lm5041bsdx National Semiconductor Corporation, lm5041bsdx Datasheet - Page 10

• Manufacturer Part Number: lm5041bsdx
• Description: Cascaded Pwm Controller
• Manufacturer: National Semiconductor Corporation

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PWM Comparator
The PWM comparator compares the slope compensated cur-
rent ramp signal to the loop error voltage from the internal
error amplifier (COMP pin). This comparator is optimized for
speed in order to achieve minimum controllable duty cycles.
The comparator polarity is such that 0V on the COMP pin will
produce zero duty cycle in the buck stage.
Error Amplifier
An internal high gain wide-bandwidth error amplifier is pro-
vided within the LM5041B. The amplifier’s non-inverting input
is tied to a 0.75V reference. The inverting input is connected
to the FB pin. In non-isolated applications the power converter
output is connected to the FB pin via the voltage setting re-
sistors. Loop compensation components are connected be-
tween the COMP and FB pins. For most isolated applications
the error amplifier function is implemented on the secondary
side of the converter and the internal error amp is not used.
The internal error amplifier is configured as an open drain
output and can be disabled by connecting the FB pin to
ground. An internal 5 kΩ pull-up resistor between the 5V ref-
erence and the COMP pin can be used as the pull-up for an
opto-coupler in isolated applications.
Current Limit/Current Sense
The LM5041B provides cycle-by-cycle over-current protec-
tion. If the voltage at the CS comparator (CS pin voltage plus
slope comp voltage) exceeds 0.5V the present buck stage
duty cycle is terminated (cycle by cycle current limit). A small
RC filter located near the controller is recommended to filter
current sense signals at the CS pin. An internal MOSFET dis-
charges the external CS pin for an additional 50 ns at the
beginning of each cycle to reduce the leading edge spike that
occurs when the buck stage MOSFET is turned on.
The LM5041B current sense and PWM comparators are very
fast, and may respond to short duration noise pulses. Layout
considerations are critical for the current sense filter and
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sense resistor. The capacitor associated with the CS filter
must be placed close to the device and connected directly to
the pins of the controller (CS and GND). If a current sense
transformer is used, both leads of the transformer secondary
should be routed to the sense resistor, which should also be
located close to the IC. A resistor may be used for current
sensing instead of a transformer, located in the push-pull
transistor sources, but a low inductance type of resistor is re-
quired. When designing with a sense resistor, all of the noise
sensitive low power grounds should be connected together
around the IC and a single connection should be made to the
high current power ground (sense resistor ground point).
Oscillator and Sync Capability
The LM5041B oscillator is set by a single external resistor
connected between the RT pin and GND. To set a desired
oscillator frequency (F), the necessary RT resistor can be
calculated from:
The buck stage will switch at the oscillator frequency and each
push-pull output will switch at half the oscillator frequency in
a push-pull configuration. The LM5041B can also be syn-
chronized to an external clock. The external clock must have
a higher frequency than the free running frequency set by the
RT resistor. The clock signal should be capacitively coupled
into the RT pin with a 100 pF capacitor. A peak voltage level
greater than 3V is required for detection of the sync pulse.
The sync pulse width should be set in the 15 ns to 150 ns
range by the external components. The RT resistor is always
required, whether the oscillator is free running or externally
synchronized. The voltage at the RT pin is internally regulated
to 2V. The RT resistor should be located very close to the
device and connected directly to the pins of the IC (RT and
GND).
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