x9523v20iz-bt1 Intersil Corporation, x9523v20iz-bt1 Datasheet - Page 13

• Manufacturer Part Number: x9523v20iz-bt1
• Description: Dual Dcp, Por, Dual Voltage Monitors
• Manufacturer: Intersil Corporation

WP: Write Protection Pin
When the Write Protection (WP) pin is active (HIGH), it
disables nonvolatile write operations to the X9523.
The table (X9523 Write Permission Status) summarizes
the effect of the WP pin (and DCP Write Lock), on the
write permission status of the device.
Additional Data Protection Features
In addition to the preceding features, the X9523 also
incorporates the following data protection functionality:
—The proper clock count and data bit sequence is
VOLTAGE MONITORING FUNCTIONS
V1 / Vcc Monitoring
The X9523 monitors the supply voltage and drives the
V1RO output HIGH (using an external “pull up” resistor)
if V1/Vcc is lower than V
output will remain HIGH until V1/Vcc exceeds V
for a minimum time of t
V1RO pin is driven to a LOW state. See Figure 25.
For the Power-on/Low Voltage Reset function of the
X9523, the V1RO output may be driven HIGH down to a
V1/Vcc of 1V (V
of the X9523, is that the value of t
in software via the CONSTAT register (See “POR1,
POR0: Power-on Reset bits - (Nonvolatile)” on page 11.).
V1 / Vcc
required prior to the STOP bit in order to start a nonvol-
atile write cycle.
V1RO
MR
Figure 15. Manual Reset Response
0 Volts
0 Volts
0 Volts
RVALID
). See Figure 25. Another feature
13
PURST
TRIP1
PURST
threshold. The V1RO
. After this time, the
t
PURST
may be selected
V
TRIP1
TRIP1
X9523
It is recommended to stop communication to the device
while while V1RO is HIGH. Also, setting the Manual
Reset (MR) pin HIGH overrides the Power-on/Low
Voltage circuitry and forces the V1RO output pin HIGH
(See "Manual Reset").
Manual Reset
The V1RO output can be forced HIGH externally using
the Manual Reset (MR) input. MR is a de-bounced, TTL
compatible input, and so it may be operated by connect-
ing a push-button directly from V1/Vcc to the MR pin.
V1RO remains HIGH for time t
returned to its LOW state (See Figure 15). An external
“pull down” resistor is required to hold this pin (nor-
mally) LOW.
V2 monitoring
The X9523 asserts the V2RO output HIGH if the volt-
age V2 exceeds the corresponding V
(See Figure 16). The bit V2OS in the CONSTAT regis-
ter is then set to a “0” (assuming that it has been set to
“1” after system initilization).
The V2RO output may remain active HIGH with V
down to 1V.
V3 monitoring
The X9523 asserts the V3RO output HIGH if the volt-
age V3 exceeds the corresponding V
(See Figure 16). The bit V3OS in the CONSTAT regis-
ter is then set to a “0” (assuming that it has been set to
“1” after system initilization).
The V3RO output may remain active HIGH with V
down to 1V.
Vx
V1 / Vcc
VxRO
(x = 2,3)
Figure 16. Voltage Monitor Response
0 Volts
PURST
TRIP2
TRIP3
after MR has
V
V
January 3, 2006
TRIP1
TRIPx
threshold
threshold
0V
0V
FN8209.1
CC
CC