ncp3127 ON Semiconductor, ncp3127 Datasheet - Page 2

• Manufacturer Part Number: ncp3127
• Description: Ncp3127 2 A Synchronous Pwm Switching Converter
• Manufacturer: ON Semiconductor

COMP
Table 1. PIN DESCRIPTION
FB
Pin
1
2
3
4
5
6
7
8
VREF
Pin Name
0.8 V
COMP
PGND
AGND
ISET
VSW
BST
VIN
FB
−
+
−
+
AGND
The PGND pin is the high current ground pin for the low−side MOSFET and the drivers. The pin should be
soldered to a large copper area to reduce thermal resistance.
nverting input to the Operational Transconductance Amplifier (OTA). The FB pin in conjunction with the
external compensation, serves to stabilize and achieve the desired output voltage with voltage mode
compensation.
COMP pin is used to compensate the OTA which stabilizes the operation of the converter stage. Place
compensation components as close to the converter as possible.
The AGND pin serves as small−signal ground. All small−signal ground paths should connect to the AGND
pin at a single point, avoiding any high current ground returns.
Supply rail for the floating top gate driver. To form a boost circuit, use an external diode to bring the desired
input voltage to this pin (cathode connected to BST pin). Connect a capacitor (CBST) between this pin and
the VSW pin. Typical values for CBST range from 1 nF to 10 nF. Ensure that CBST is placed near the IC.
The VIN pin powers the internal control circuitry and is monitored by an undervoltage comparator. The VIN
pin is also connected to the internal power NMOSFET switches. The VIN pin has high dI/dt edges and
must be decoupled to PGND pin close to the pin of the device.
Current set pin and bottom gate MOSFET driver. Place a resistor to ground to set the current limit of the
converter.
The VSW pin is the connection of the drain and source of the internal N−MOSFETs. The VSW pin swings
from V
high dV/dt transitions.
Ramp
IN
10 mA
Clock
OSC
OSC
when the high side switch is on to small negative voltages when the low side switch is on with
+
−
Comp
PWM
Figure 3. NCP3127 Block Diagram
Fault
VREG
CIRCUIT DESCRIPTION
Count
Latch
Logic
&
http://onsemi.com
Latch
UVLO
POR
R
S
Counter
PWM
OUT
−
+
2
−
+
0.7 V
SCP
Q
DtoA
Description
Fault
Fault
+
−
+
−
VOCTH
+
−
−
+
2 V
BST
VCC
ISET
PGND
VIN
VSW