lm5109sdx National Semiconductor Corporation, lm5109sdx Datasheet - Page 4

• Manufacturer Part Number: lm5109sdx
• Description: 100v / 1a Peak Half Bridge Gate Driver
• Manufacturer: National Semiconductor Corporation

www.national.com
LM5109
t
t
t
t
t
t
t
t
LPHL
HPHL
LPLH
HPLH
MON
MOFF
RC
PW
Symbol
Switching Characteristics
Specifications in standard typeface are for T
perature range. Unless otherwise specified, V
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the
Electrical Characteristics tables.
Note 2: The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. Pin 6 , Pin 7 and Pin 8 are rated at 500V.
Note 3: 4 layer board with Cu finished thickness 1.5/1/1/1.5 oz. Maximum die size used. 5x body length of Cu trace on PCB top. 50 x 50mm ground and power
planes embedded in PCB. See Application Note AN-1187.
Note 4: Min and Max limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical
Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Note 5: The θ
Note 6: In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage will generally not exceed -1V.
However in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently.
If negative transients occur on HS, the HS voltage must never be more negative than V
exceed -5V.
, t
FC
Lower Turn-Off Propagation Delay (LI
Falling to LO Falling)
Upper Turn-Off Propagation Delay (HI
Falling to HO Falling)
Lower Turn-On Propagation Delay (LI
Rising to LO Rising)
Upper Turn-On Propagation Delay (HI
Rising to HO Rising)
Delay Matching: Lower Turn-On and
Upper Turn-Off
Delay Matching: Lower Turn-Off and
Upper Turn-On
Either Output Rise/Fall Time
Minimum Input Pulse Width that
Changes the Output
JA
is not a constant for the package and depends on the printed circuit board design and the operating conditions.
Parameter
J
= +25˚C, and those in boldface type apply over the full operating junction tem-
DD
= V
C
L
HB
= 1000 pF
= 12V, V
Conditions
4
SS
DD
= V
- 15V. For example, if V
HS
= 0V, No Load on LO or HO.
Min
DD
= 10V, the negative transients at HS must not
Typ
27
27
29
29
15
50
2
2
Max
56
56
56
56
15
15
-
Units
ns
ns
ns
ns
ns
ns
ns
ns