hip6004e-isl16525evl Intersil Corporation, hip6004e-isl16525evl Datasheet
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hip6004e-isl16525evl
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hip6004e-isl16525evl Summary of contents
Page 1
... The HIP6004E monitors the output voltage with a window comparator that tracks the DAC output and issues a Power Good signal when the output is within ±10%. The HIP6004E protects against over-current and overvoltage conditions by inhibiting PWM operation. Additional built-in overvoltage protection triggers an external SCR to crowbar the input supply ...
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... OVP RT OSC VID25mV VID0 VID1 D/A VID2 VID3 + FB - COMP Block Diagram VSEN OCSET REFERENCE VID25mV D/A VID0 CONVERTER VID1 VID2 (DAC) VID3 FB COMP RT 2 HIP6004E VCC V = +5V OR +12V IN OCSET BOOT UGATE PHASE - LGATE + PGND VSEN GND 110% RESET (POR 90 OVER- 115% VOLTAGE + - + - ...
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... OCSET current source OVP sourcing current Soft start current POWER GOOD Upper threshold (VSEN/DACOUT) Lower threshold (VSEN/DACOUT) Hysteresis (VSEN/DACOUT) PGOOD voltage low 3 HIP6004E Thermal Information Thermal resistance (Typical, Note 1) SOIC package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V CC TSSOP package . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum junction temperature . . . . . . . . . . . . . . . . . . . . . . . 150 Maximum storage temperature range . . . . . . . . . . . -65 Maximum lead temperature (soldering 10s) ...
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... Connect a capacitor from this pin to ground. This capacitor, along with an internal 10µA current source, sets the soft- start interval of the converter. VID25mV-VID3 (Pins 4-8) VID25mV - VID3 are the input pins to the 5-bit DAC. The states of these five pins program the internal voltage 4 HIP6004E ...
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... RT pin has a constant voltage of 1.26V typically. Functional Description Initialization The HIP6004E automatically initializes upon receipt of power. Special sequencing of the input supplies is not necessary. The Power-On Reset (POR) function continually monitors the input supply voltages. The POR monitors the bias voltage at the VCC pin and the input voltage ( the OCSET pin ...
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... Inductor Selection”. A small, ceramic capacitor should be placed in parallel with R OCSET presence of switching noise on the input voltage. Output Voltage Program The output voltage of a HIP6004E converter is programmed to ) discreet levels between 1.05V OCSET identification (VID) pins program an internal voltage reference that is referenced to (DACOUT) with a TTL-compatible 5-bit digital-to-analog converter (DAC) ...
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... The components shown in Figure 5 should be located as close together as possible. Please note that the capacitors C and C IN numerous physical capacitors. Locate the HIP6004E within 3 inches of the MOSFETs, Q and Q . The circuit traces for the 1 2 MOSFETs’ ...
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... ESR 2π The compensation network consists of the error amplifier (internal to the HIP6004E) and the impedance networks Z and Z . The goal of the compensation network is to provide FB a closed loop transfer function with the highest 0dB crossing frequency (f ) and adequate phase margin ...
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... Given a sufficiently fast control loop design, the HIP6004E will provide either 0% or 100% duty cycle in response to a load transient. The response time is the time required to slew the inductor current from an initial current value to the transient current level ...
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... S Standard-gate MOSFETs are normally recommended for use with the HIP6004E. However, logic-level gate MOSFETs can be used under special circumstances. The input voltage, upper gate drive level, and the MOSFET’s absolute gate-to- source voltage rating determine whether logic-level MOSFETs are appropriate ...
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... L - Core: micrometals T50-52; winding: 5 turns of 16AWG HIP6004E HIP6004E DC-DC Converter Application Circuit Figure 11 shows an application circuit of a DC-DC Converter for a microprocessor. Detailed information on the circuit, including a complete bill-of-materials and circuit board description, can be found in AN9916. This application note also contains the application information for ISL6525, an controller IC designed to meet the VTT voltage and power- up sequencing specification given in the Intel VRM8 ...
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... Minimum space between protru- sion and adjacent lead is 0.07mm (0.0027 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. (Angles in degrees) 12 HIP6004E M20.173 20 LEAD THIN SHRINK SMALL OUTLINE PLASTIC ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 13 HIP6004E M20.3 (JEDEC MS-013-AC ISSUE C) 20 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE ...