hip6500 Intersil Corporation, hip6500 Datasheet - Page 9

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hip6500

Manufacturer Part Number
hip6500
Description
Multiple Linear Power Controller With Acpi Control Interface
Manufacturer
Intersil Corporation
Datasheet

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Soft-Start Circuit
SOFT-START INTO SLEEP STATES (S3, S4/S5)
The 5VSB POR function initiates the soft-start sequence. An
internal 10 A current source charges an external capacitor.
The error amplifiers reference inputs are clamped to a level
proportional to the SS (soft-start) pin voltage. As the SS pin
voltage slews from about 1.25V to 2.5V, the input clamp
allows a rapid and controlled output voltage rise.
FIGURE 8. 2.5/3.3V
INTERNAL
0V
0V
FIGURE 9. SOFT-START INTERVAL IN A SLEEP STATE
DEVICE
VSEN2
VSEN2
3V3SB
DRV2
VCLK
5VSB
T0
12V
VOLTAGES
S3
S5
OUTPUT
(1V/DIV)
T1 T2
(1V/DIV)
(ALL OUTPUTS ENABLED)
5VSB
MEM
V
T3
OUT1
, 3.3V
SOFT-START
(3.3V
(1V/DIV)
SB
TIME
9
SB
T4
AND VCLK TIMING DIAGRAM
)
T5
V
V
(2.5V
OUT5
OUT3
V
OUT2
MEM
(5V
(3.3V
)
DUAL
DUAL
(2.5V
V
OUT4
)
CLK
)
)
HIP6500
Figure 9 shows the soft-start sequence for the typical
application start-up in sleep state with all output voltages
enabled. At time T0 5VSB (bias) is applied to the circuit. At
time T1 the 5VSB surpasses POR level. An internal fast
charge circuit quickly raises the SS capacitor voltage to
approximately 1V, then the 10 A current source continues
the charging. The soft-start capacitor voltage reaches
approximately 1.25V at time T2, at which point the 3.3V
error amplifiers’ reference input starts its transition, causing
the output voltage to ramp up proportionally. The ramp-up
continues until time T3 when the 3.3V
set value. After the 3.3V
start capacitor voltage reaches approximately 2.75V, the
under-voltage monitoring circuit of this output is activated
and the soft-start capacitor is quickly discharged to
approximately 1.25V. Following the 3ms (typical) time-out
between T3 and T4, the memory and enabling pins’
selection are latched in, and the soft-start capacitor
commences a second ramp-up designed to smoothly bring
up the remainder of the voltages required by the system. At
time T5 all voltages are within regulation limits, and as the
SS voltage reaches 2.75V, all the UV monitors are activated
and the SS capacitor is quickly discharged to 1.25V, where it
remains until the next transition.
+5VSB
FIGURE 10. SOFT-START INTERVAL IN ACTIVE STATE
0V
0V
T0
VOLTAGES
OUTPUT
(1V/DIV)
INPUT VOLTAGES
T1
(2.5/3.3V
V
V
OUT3
OUT1
+3.3V
(2V/DIV)
+5V
+12V
IN
(3.3V
IN
IN
(3.3V
MEM
SB
DUAL
SB
OUTPUT SHOWN IN 2.5V SETTING)
)
reached its set value, as the soft-
)
T2
TIME
V
OUT5
SB
(5V
T3
voltage reaches the
(2.5V
DUAL
SOFT-START
DLA PIN
(2V/DIV)
(1V/DIV)
MEM
V
)
OUT2, 4
, 2.5V
CLK
SB
)

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