bd6758mwv ROHM Co. Ltd., bd6758mwv Datasheet - Page 12

• Manufacturer Part Number: bd6758mwv
• Description: 5ch System Lens Drivers For Digital Still Cameras 
• Manufacturer: ROHM Co. Ltd.

Standby mode
MODE13
MODE23
MODE34
MODE45
INxA
INxB
TEST
4)
No.
00H
01H
02H
03H
04H
VCC
PS
STROBE
SCLK
SDATA
Bit Name
Serial Input (BD6370GUL; STROBE, SCLK, and SDATA)
Bit[E]
0
0
0
0
1
(1) Function Explanation
(2) Serial Register Bit Map
ADDRESS BIT
Bit[D]
0
0
1
1
0
OUT1A-OUT3A resemblance drive select
OUT2A-OUT3B resemblance drive select
INPUT34 terminal select ch3 or ch4
INPUT45 terminal select ch4 or ch5
Control input mode select ch1 to ch5 (x=1 to 5)
Control input mode select ch1 to ch5 (x=1 to 5)
TEST BIT (Low level input fixed)
The BD6370GUL provides a 3-line serial interface for setting output modes and D/A converters.
SDATA is sent to the internal shift register during the STROBE low interval at the SCLK rising edge. Shift register data (Bit[B]
to Bit[0]) is written to the IC's internal 12-bit memory at the STROBE rising edge, according to the addresses stored in Bit[E],
Bit[D], and Bit[C]. The serial data input order is Bit[E] to Bit[0].
In the case of the resemblance drive mode (MODE13=1 and/or MODE23=1), input the serial data to be the same condition of
DAC12 and DAC3.
Be cancelled power saving mode after turned on power supply VCC and VM. Serial settings are reset when the PS pin
changes to Low-level control voltage, because of PS terminal combines power saving with serial reset function. Serial settings
are also reset when the UVLO or TSD circuit operates.
Bit Map is consisted of 5 addresses and 60 data. It is the prohibited bit of MODExx input. Don’t input the prohibited bit at all
times. A low level should be input to the TEST bit at all times. A high signal may cause the IC to malfunction.
(a) The Prohibited Input of MODE Bit
Active mode
RESET period; 20μs
PROTECT period; 50μs
Bit[C]
0
1
0
1
0
(MODE45, MODE34, MODE23, MODE13) = (0, 0, 0, 1), (0, 0, 1, 0), (0, 0, 1, 1), (1, 0, 0, 1), (1, 0, 1, 0), (1, 0, 1, 1),
DACV4[5]
DAC12[5]
Bit[E]
DAC5[5]
Bit[B]
TEST
TEST
ADDRESS BITS
Bit[D]
Against the malfunction, it makes delay time to enable serial input in the IC
DAC12[4]
DACV4[4]
Timing of input serial data
writing to internal register
DAC5[4]
Function
Bit[A]
TEST
TEST
Bit[C]
Fig.42 Sequence of Serial Control Input
DAC12[3]
DACV4[3]
MODE45
DAC5[3]
Bit[9]
IN5B
Bit[B]
BD6370GUL Serial Register Bit Function
BD6370GUL Serial Register Bit Map
Bit[A]
MODE34
DACV4[2]
DAC12[2]
DAC5[2]
Bit[8]
IN5A
Bit[9]
MODE23
DACV4[1]
DAC12[1]
DAC5[1]
12/32
Bit[7]
IN4B
(1, 1, 0, 0), (1, 1, 0, 1), (1, 1, 1, 0), (1, 1, 1, 1)
Bit[8]
MODExA
MODExB
MODExC
MODExC
MODExD
DACx[y]
Bit Name
DAC12[0]
DACV4[0]
MODE13
DAC5[0]
Bit[7]
Bit[6]
IN4A
DATA BIT
Bit[6]
DAC3[5]
MODE3C
MODE5B
DACI4[5]
DATA BITS
Control input mode select ch1 to ch5 (x=1 to 5)
Control input mode select ch1 to ch5 (x=1 to 5)
Output drive select Constant-Voltage / Full-ON
mode ch1 to ch3 (x=1 to 3)
Output drive select Constant-Voltage /
Constant-Current / Full-ON mode ch4 (x=4)
6Bit D/A Converter output select ch1 to ch5
(x=12 to 5, y=0 to 5)
Bit[5]
IN3B
Bit[5]
MODE3B
MODE5A
DACI4[4]
DAC3[4]
Bit[4]
IN3A
Bit[4]
Timing of register data
writing to internal memory
Bit[3]
MODE3A
MODE4D
DACI4[3]
DAC3[3]
Bit[3]
IN2B
Function
Bit[2]
MODE12C
MODE4C
DACI4[2]
DAC3[2]
Bit[2]
IN2A
Bit[1]
MODE12B
MODE4B
DACI4[1]
DAC3[1]
Bit[1]
IN1B
Bit[0]
MODE12A
MODE4A
DACI4[0]
DAC3[0]
Bit[0]
IN1A
100%
100%
100%
100%
100%
0%
0%
0%
0%
0%