W83301DR Winbond Electronics Corp America, W83301DR Datasheet - Page 8

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W83301DR

Manufacturer Part Number
W83301DR
Description
Description = Acpi-str Controller With DDR Bus Termination Regulator ;; Package = Tssop 24
Manufacturer
Winbond Electronics Corp America
Datasheet

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7. Functional Description
7.1 ACPI State Control
machine to generate ACPI-compliant power state transition.
S0 (Full-Power State), S3 (Sleeping State-Suspend to RAM), S5
and all of the state changes to the other according to the value of S3#, S5# and 5V
On the other hand, cause of the W83301DR-O allows the user to disable/enable the 5V
output in S5 state via the 5V
to S5 state. Besides, a soft ramp-up mechanism is needed to protect the 5V
the rush current attack during the S5
the W83301DR-O also implements soft ramp-up mechanism in each STR outputs during
the S5
power supply ramps up to 4.5V, the chip will enters the S5
will enters the S5
and S5#=1, the system will enters the S0 state from S5
(S5#=0) state when the system is idle for a long time or user presses the power button.
by (S3#=1, S5#=1,PWOK=1), or gets into S5 state by (S5#=0).
Table 1. W83301DR-O Outputs Table
* Only the STR1 has linear under voltage function.
S5 (5V
S5 (5V
In order to meet the ACPI specification, the W83301DR-O implements an internal state
There are five states in the state machine, the five states are G3 (Mechanical-Off State),
As the internal state machine, when the power turns on, the voltage of 5VSB of the ATX
In the S5
When the system in the S0 state, the system will enters the S3 (S3#=0, S5#=1) or S5
When the system enters the S3 state, the system will waked up and enter the S0 state
State
G3
S0
S3
On
DL
DL
state transfers to the S0 state.
Off)
On)
On
state, the chip will returns back to the S5
(Driven by 5V
(Driven by 5V
(Driven by 5V
On
state if the signal of 5V
5V
Off
Off
On
On
On
DL
DLEN
DLSB
DLSB
DRV
# pin, there are two states - S5
)
)
)
(Driven by 3V
(Driven by 3V
(Driven by 3V
(Driven by 3V
Off
to S5
3V
Off
On
On
On
On
DLEN
6
DL
On
#=0 and S5#=0; When the signals S3#=1
state transition. Same as the 5V
DLSB
DLSB
DLSB
DRV
)
)
)
)
off
Off
.
STR1
state if the 5V
Off
Off
Off
On
On
Off
state from the G3 state, and
On
and S5
On
STR2
Publication Release Date: Jul., 2002
(Soft-Off State), S5
Off
Off
Off
On
On
W83301DR-O
DLEN
Off
, corresponding
#=1 is set.
LUV Activity *
DL
output from
DL
Yes
Yes
No
No
No
Revision 1.0
output,
DLEN
DUAL
Off
#.

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