bd9842fv ROHM Co. Ltd., bd9842fv Datasheet - Page 8

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bd9842fv

Manufacturer Part Number
bd9842fv
Description
Dual-output High Voltage High-frequency Step-down Switching Regulator Controller Type
Manufacturer
ROHM Co. Ltd.
Datasheet

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4) Soft start 1/2 (soft start function)
Soft start time TSS is shown by the formula below:
(Ex) When Css = 0.1 micro F
5) PWM Comp 1/2 - DEAD TIME (Pause period adjusting circuit - dead time)
6) OCP Comp 1/2 (overcurrent detection circuit)
Dead time voltage VDT in Fig 32 is shown by the formula below:
Tss = Css・
Relation between VDT and Duty [See the graph on the right.]
It is possible to provide SS terminal (pin 3 and 18) with soft start
function by connecting C
In order to function soft start, time must be set longer enough than start
time of power supply and STB.
It is also possible to provide function of soft start by connecting the
resistor (R1/R2) and capacitor (C
shown on the right.
Dead time can be set by applying voltage dividing resistance between VREF and GND to DT terminal (pin 2 and 19).
PWM Comp compares the input dead time voltage (DT terminal voltage) and error voltage from Err Amp (FB terminal
voltage) with triangular wave, and turns off and on the output. When dead time voltage < error voltage, duty of output is
determined by dead time voltage. (When dead time setting is not used, pull up DT terminal to VREF terminal with resistor
approx 10 k ohms.)
When oscillation frequency is high, upper/lower limit of triangular wave (Vt100/Vt0)
is shifted by delay time of comparator to directions expanding amplitude. Be careful.
This function provides protection by forcibly turning off the output when
abnormal overcurrent flows due to shorting of output, etc. When voltage
between terminal OCP+(pin 8 and 13)/OCP-(pin 7 and 14) monitoring the
current with sense resistor exceeds overcurrent detection voltage (50 mV
typ), it is determined as overcurrent condition, and switching operation is
stopped immediately by setting OUT to "H" and DT,SS (and FB) to "L".
It is automatically recovered when voltage between terminal OCP+/OCP-
is below overcurrent detection voltage.
In addition, although hysteresis, etc. are not set here, minimum detection
retention time (1.6mStyp) is set for suppressing the heating of FET, etc.
(See the timing chart.)
When the overcurrent detection circuit is not used, short-circuit both
terminal OCP+/OCP- to VCC pin.
When f = 100kHz
When f = 1.5MHz
Tss =
VDT = VREF・
=
5 [msec]
0.01×10
Issso
Vinv
2×10
1.95
min
1.9
R1+R2
-6
SS
-6
R2
×1
as shown on the right.
Css : SS terminal connection capacity
Vinv : Error amplifier reference voltage
(1V typ)
Issso : SS source current (2 micro A typ)
Duty 100%
2.0
2.1
typ
DT
) to DT terminal (pin 2 and 19) as
max
2.25
2.1
1.35
min
1.4
8/15
Duty 0%
1.5
1.5
typ
[Unit : V]
max
1.65
1.6
Css
電流の向き
of current
Direction
センス抵抗
C
INV
SS
resistor
DT
Sense
3/18
4/17
2.4
2.2
1.8
1.6
1.4
1.2
2
1
100
VIN
1Vtyp.
Fig.32
VREF
OCP+
OCP-
Fig.33
R 1
8/13
7/14
R 2
2uA
Fig.35
Fig.34
fosc[KHz]
50mVtyp.
2/19
1000
20
VREF
DT
OCP Comp
ErrAmp
Vt100
Vt0
10000

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