lm96511ccsm National Semiconductor Corporation, lm96511ccsm Datasheet

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lm96511ccsm

Manufacturer Part Number
lm96511ccsm
Description
Lm96511 Ultrasound Receive Analog Front End Afe
Manufacturer
National Semiconductor Corporation
Datasheet

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Part Number:
lm96511ccsm/NOPB
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Quantity:
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© 2010 National Semiconductor Corporation
Ultrasound Receive Analog Front End (AFE)
General Description
The LM96511 is an 8-channel integrated analog front end
(AFE) module for multi-channel applications, particularly
medical ultrasound. Each of the 8 signal paths consists of a
low noise amplifier (LNA), a digitally programmable variable
gain amplifier (DVGA) and a 12-bit, 40 to 50 Mega Samples
Per Second (MSPS) analog-to-digital converter (ADC) with
Instant Overload Recovery (IOR). The architecture of the DV-
GA is a digitally-controlled linear-in-dB step attenuator driving
a fixed-gain post-amplifier (PA). The ADC uses a Continuous-
Time-Sigma-Delta (CTΣΔ) architecture with digital decima-
tion filtering to maximize dynamic performance and provide
an alias free input bandwidth to ADC CLK / 2. The ADC digital
outputs are serialized and provided on differential LVDS out-
puts. The ADC includes an on-chip clock cleaner PLL.
In addition, for baseband CW Doppler Beamformer applica-
tions, an 8-channel demodulator with 16 discrete phase rota-
tion angles is included.
Selective power reduction is included to minimize consump-
tion of idle sections during interleaved imaging modes.
An SPI™ compatible serial interface allows dynamic digital
programming and control. National Semiconductor offers a
full development package for sale which includes acquisition
analysis hardware and software with user friendly GUI for de-
vice programming and control.
Features
8-channel LNA, DVGA, and 12-bit Continuous Time
ADC
Programmable Active Termination LNA
8-channel, integrated CW Doppler Beamforer
Low-power consumption
Embedded ADC Digital Filter
ADC Instant Overload Recovery
Embedded ADC “clock-cleaning” PLL
11 mm x 17 mm RoHS BGA Package
300870
LM96511
Δ
B-Mode:
Total Input Voltage Noise (RTI)
Max AFE Gain
Single-Ended Input Swing
Programmable Maximum DVGA
Attenuation
Programmable Post Amp Gain
Attenuator Step Resolution
ADC Resolution
Conversion Rate (ADC CLK)
ADC Digital Filter stop band
attenuation
ADC Digital Filter Passband Ripple
ADC Instant Overload Recovery
Power Consumption (per channel)
CW Doppler Mode:
Phase Rotation Resolution
Phase Noise (Per Channel, Offset =
5KHz)
Dynamic Range
Amplitude Quadrature Error (I to Q)
Phase Quadrature Error (I to Q)
Power Consumption (Per Channel)
Common Specifications:
LNA Input Voltage Noise
Operating temp. Range
Key Specifications
(Full path unless noted)
Applications
Ultrasound Imaging
Communications
Portable Instrumentation
Sonar
1 ADC Clock Period
September 3, 2010
38, 36, 34, 32 dB
40 to 50 MSPS
www.national.com
0.05 or 0.1 dB
22.5 degrees
-144 dBc/Hz
0.82 nV/vHz
31 or 38 dB
-161 dB/Hz
0.9 nV/vHz
0 to +70°C
± 0.01 dB
± 0.04 dB
500mVpp
110 mW
208 mW
± 0.10°
12 bits
58 dB
72 dB

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lm96511ccsm Summary of contents

Page 1

... Embedded ADC Digital Filter ■ ADC Instant Overload Recovery ■ Embedded ADC “clock-cleaning” PLL ■ RoHS BGA Package © 2010 National Semiconductor Corporation LM96511 Key Specifications (Full path unless noted) B-Mode: Total Input Voltage Noise (RTI) Max AFE Gain ...

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Simplified LM96511 Block Diagram Typical Application www.national.com FIGURE 1. Simplified LM96511 Block Diagram 8-Channel Transmit/Receive Chipset 2 30087001 30087010 ...

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General Description .............................................................................................................................. 1 Features .............................................................................................................................................. 1 Key Specifications ................................................................................................................................ 1 Applications ......................................................................................................................................... 1 Simplified LM96511 Block Diagram ......................................................................................................... 2 Typical Application ................................................................................................................................ 2 Connection Diagrams ............................................................................................................................ 4 Ordering Information ............................................................................................................................. 5 Pin Descriptions ................................................................................................................................... 6 Typical Performance Characteristics ..................................................................................................... ...

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Connection Diagrams FIGURE 2. 376–Pin BGA Package Top View (18 Rows by 32 Columns) www.national.com 4 30087002 30087011 ...

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... Ordering Information Order Number Package Type LM96511CCSM NOPB TFBGA 376 SPI™ trademark of Motorola Inc. NSC Package Drawing Supplied As SLM376A Trays TRI_STATE® registered trademark of National Semicon- ductor Corporation. 5 www.national.com ...

Page 6

Pin Descriptions Ball Id. Pin Name (Row_Column) U1 LNA IN CH0+ R1 LNA IN CH1+ N1 LNA IN CH2+ L1 LNA IN CH3+ J1 LNA IN CH4+ G1 LNA IN CH5+ E1 LNA IN CH6+ D2 LNA IN CH7+ V1 ...

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Ball Id. Pin Name (Row_Column) U10 CW Q CH0 V17 CW Q CH1 P17 CW Q CH2 N14 CW Q CH3 G14 CW Q CH4 F14 CW Q CH5 A17 CW Q CH6 B11 CW Q CH7 K14 DVGA CLK ...

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Ball Id. Pin Name (Row_Column) ADC WCLK+ ADC WCLK- A30 A29 A32 ADC BCLK+ A31 ADC BCLK- _______ U25 ADC RST V26 ADC CW/DVGA V22 ADC VREF V21 ADC VREF GND U23 ADC RREF V23 ADC LPF BYP B3 SPI™ ...

Page 9

Ball Id. Pin Name (Row_Column) A10, B8, C16, C17, D14, D15, D17, E4, E14, G3, J3, J16, K17, L3, L16, M4, N4, R3, AMP AVCC A R14, R15, T4, T14, T15, U4, U7, U8, U13, V4, V6, V13 B10, B14, ...

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Ball Id. Pin Name (Row_Column) A9, A12, A13, A16, A23, A24, A25, B17, B19, B20, B21, B23, B24, B29, B31, C3, C19, C31, D3, D18, D19, F3, F17, F19, F31, G17, G18, G19, H3, J19, J31, K3, K19, AGND K31, ...

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Typical Performance Characteristics AVCC = 5V; ADC AVDD = ADC DVDD = 1.2V, ADC IO DVDD = AMP IO DVDD = 1.2V, Full Scale RF Input at 5 MHz; CW CLK = 80 MHz;; FCLK = 40 MSPS ,TA =+25°C. ...

Page 12

LNA S11 vs. Frequency HD vs. LNA Input Swing (PA HI pin = LO) RTI Noise vs. Frequency (DVGA Attenuation = 0dB) www.national.com AFE Offset Distribution IOR On Mode, Minimum DVGA attenuation, DVGA PA HI pin = LO) 30087067 HD ...

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Far-Field Overload Recovery @ Post Amp Output (No User Access) 30087073 AFE (B-Mode) Overload Recovery 13 30087094 www.national.com ...

Page 14

Spectral Response @ f ADC CLK = 400 mHz, IOR On ADC INL www.national.com =10 MHz, Close-In Spectral Response @ fIN=1.9 MHz, IN TGC Running, Cosine 6 Term Window 30087077 30087076 14 30087095 ADC DNL 30087075 ...

Page 15

CW Doppler Plots CW Doppler Output Noise (CWDIFF CLK = 80.0MHz) CW Doppler IMD3, Unequal Tones 10kHz & 15kHz Offset Separation CW Doppler Phase Noise 30087080 15 30087030 30087081 www.national.com ...

Page 16

I-Q Quadrature Phase Error (Within Channel) www.national.com I-Q Output Amplitude Match (Within Channel) 30087068 16 30087069 ...

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Physical Dimensions inches (millimeters) unless otherwise noted TBD 17 www.national.com ...

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... National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. ...

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