lm9617 National Semiconductor Corporation, lm9617 Datasheet - Page 4

• Manufacturer Part Number: lm9617
• Description: Monochrome Cmos Image Sensor Vga 30 Fps
• Manufacturer: National Semiconductor Corporation

Pin Descriptions
Confidential
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Name
vsrvdd
vrl
vdd_pix
irq
sadr
sda
sclk
snapshot
resetb
pdwn
vss_dig
vdd_dig
hsync
vsync
pclk
mclk
d0
NC
NC
d1
d2
d3
d4
d5
d6
I/O
I0
I
I
O
I
IO
I
I
I
I
I
I
IO
IO
O
I
O
O
O
O
O
O
O
Typ
P
A
P
D
D
D
D
D
D
D
P
P
D
D
D
D
D
D
D
D
D
D
D
Description
Analog bidirectional, it should be connect to ground via a 1.0 f capacitor. This pin is the
internal charge pump voltage source.
Anti blooming pin. This pin is normally tied to ground.
3.3 volt supply for the pixel array.
Digital output, the interrupt request pin. This pin generates interrupts during snapshot
mode.
Digital input with pull down resistor. This pin is used to program different slave addresses
for the sensor in an I
I
driver.
I
Digital input with pull down resistor used to activate (trigger) a snapshot sequence.
Digital input with pull up resistor. When forced to a logic 0 the sensor is reset to its default
power up state. The resetb signal is internally synchronized to mclk which must be run-
ning for a reset to occur.
Digital input with pull down resistor. When forced to a logic 1 the sensor is put into power
down mode.
0 volt power supply for the digital circuits.
3.3 volt power supply for the digital circuits.
Digital Bidirectional. This is a dual mode pin. When the sensor’s digital video port is con-
figured to be a master, (the default), this pin is an output and is the horizontal synchroni-
zation pulse. When the sensor’s digital video port is configured to be a slave, this pin is
an input and is the row trigger.
Digital Bidirectional. This is a dual mode pin. When the sensor’s digital video port is con-
figured to be a master, (the default), this pin is an output and is the vertical synchroniza-
tion pulse. When the sensor’s digital video port is configured to be a slave, this pin is an
input and is the frame trigger.
Digital output. The pixel clock.
Digital input. The sensor’s master clock input.
Digital output. Bit 0 of the digital video output bus. This output can be put into tri-state
mode.
Pin not used, do not connect.
Pin not used, do not connect.
Digital output. Bit 1 of the digital video output bus. This output can be put into tri-state
mode.
Digital output. Bit 2 of the digital video output bus. This output can be put into tri-state
mode.
Digital output. Bit 3 of the digital video output bus. This output can be put into tri-state
mode.
Digital output. Bit 4 of the digital video output bus. This output can be put into tri-state
mode.
Digital output. Bit 5 of the digital video output bus. This output can be put into tri-state
mode.
Digital output. Bit 6 of the digital video output bus. This output can be put into tri-state
mode.
2
2
C compatible serial interface data bus. The output stage of this pin has an open drain
C compatible serial interface clock.
2
C compatible system.
4
www.national.com