W83977A Winbond Electronics Corp America, W83977A Datasheet - Page 91

• Manufacturer Part Number: W83977A
• Description: Winbond I/O
• Manufacturer: Winbond Electronics Corp America

0
1-3
4
5
6-7
9.3.2 Power Management 1 Status Register 2 (PM1STS2)
Register Location:
Default Value:
Attribute:
Size:
0-6
7
Bit
Bit
TMR_STS
Reserved
BM_STS
GBL_STS
Reserved
Reserved
WAK_STS
Name
Name
7
8 bits
6
Reserved.
This bit is set when the system is in the sleeping state and an enabled resume
event occurs. Upon setting this bit, the sleeping/working state machine will
transition the system to the working state. This bit is only set by hardware and
is cleared by writing a 1 to this bit position or by the sleeping/working state
machine automatically when the global standby timer expires. Writing a 0 has
no effect. When the WAK_STS is cleared and all devices are in sleeping
state, the whole chip enters the sleeping state.
This bit is the timer carry status bit. This bit is set anytime the bit 23 of the
24-bit counter changes (whenever the MSB changes from low to high or high
to low). When TMR_EN and TMR_STS are set, a power magement event is
raised. This bit is only set by hardware and can only be cleared by writing a
1 to this bit position. Writing a 0 has no effect.
Reserved.
This is the bus master status bit. Writing a 1 to BM_CNTRL also sets
BM_STS. Writing a 1 clears this bit and also clears BM_CNTRL. Writing a
0 has no effect.
This is the global status bit.
attention of the SCI handler. BIOS sets this bit by setting BIOS_RLS and
can only be cleared by writing a 1 to this bit position. Writing a 1 to this bit
position also clears BIOS_RLS. Writing a 0 has no effect.
Reserved. These bits always return zeros.
<CR60,
00h
Read/write
5
4
61> + 1H System I/O Space
3
2
1
-81 -
0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
WAK_STS
Description
Description
This bit is set when the BIOS wants the
Publication Release Date:March 1998
W83977TF
PRELIMINARY
Revision 0.62