hcs161ms Intersil Corporation, hcs161ms Datasheet

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hcs161ms

Manufacturer Part Number
hcs161ms
Description
Rad-hard Synchronous Counter
Manufacturer
Intersil Corporation
Datasheet
September 1995
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
• Dose Rate Survivability: >1 x 10
• Dose Rate Upset >10
• Cosmic Ray Upset Immunity 2 x 10
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
• Input Current Levels Ii ≤ 5µA at VOL, VOH
Description
The Intersil HCS161MS is a Radiation Hardened 4-Input Binary;
synchronous counter featuring asynchronous reset and look-
ahead carry logic. The HCS161 has an active-low master reset to
zero, MR. A low level at the synchronous parallel enable, SPE,
disables counting and allows data at the preset inputs (p0 - p3) to
load the counter. The data is latched to the outputs on the posi-
tive edge of the clock input, CP. The HCS161MS has two count
output, IC. The terminal count output indicates a maximum count
for one clock pulse and is used to enable the next cascaded
stage to count.
The HCS161MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS161MS is supplied in a 16 lead Ceramic flatpack
(K suf fix) or a SBDIP Package (D suffix).
Ordering Information
HCS161DMSR
HCS161KMSR
HCS161D/Sample
HCS161K/Sample
HCS161HMSR
Day (Typ)
- VIL = 0.3 VCC Max
- VIH = 0.7 VCC Min
PART NUMBER
TM
10
RAD (Si)/s 20ns Pulse
TEMPERATURE RANGE
12
o
C to +125
-55
-55
RAD (Si)/s
-9
Error/Bit Day (Typ)
o
o
C to +125
C to +125
+25
+25
+25
o
o
o
o
C
C
C
C
2
/mg
-9
o
o
C
C
Errors/Bit-
193
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
SCREENING LEVEL
Pinouts
GND
MR
CP
HCS161MS
PE
P0
P1
P2
P3
FLATPACK PACKAGE (FLATPACK)
16 LEAD CERAMIC DUAL-IN-LINE
16 LEAD CERAMIC METAL SEAL
METAL SEAL PACKAGE (SBDIP)
GND
MIL-STD-1835 CDFP4-F16
MR
MIL-STD-1835 CDIP2-T16
CP
PE
P0
P1
P2
P3
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
Synchronous Counter
TOP VIEW
TOP VIEW
Radiation Hardened
16 Lead SBDIP
16 Lead Ceramic Flatpack
16 Lead SBDIP
16 Lead Ceramic Flatpack
Die
16
15
14
13
12
11
10
Spec Number
9
16
15
14
13
12
11
10
9
PACKAGE
TC
Q0
Q1
Q2
Q3
TE
SPEN
VCC
FN2469.2
518755
TC
Q0
Q1
Q2
Q3
TE
SPE
VCC

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hcs161ms Summary of contents

Page 1

... The data is latched to the outputs on the posi- tive edge of the clock input, CP. The HCS161MS has two count output, IC. The terminal count output indicates a maximum count for one clock pulse and is used to enable the next cascaded stage to count ...

Page 2

... FF0 SPE OPERATING MODE MR Reset (Clear) L Parallel Load H H Count H Inhibit High Level Low Level Immaterial, HCS161MS FF1 FF2 SPE R SPE TRUTH TABLE INPUTS SPE ...

Page 3

... VIL = 0.30(VCC) NOTES: 1. All voltages reference to device GND. 2. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”. Specifications HCS161MS Reliability Information Thermal Resistance SBDIP Package ...

Page 4

... PARAMETER SYMBOL Quiescent Current ICC VCC = 5.5V, VIN = VCC or GND Output Current (Sink) IOL VCC = 4.5V, VIN = VCC or GND, VOUT = 0.4V Output Current IOH VCC = 4.5V, VIN = VCC or GND, (Source) VOUT = VCC -0.4V Specifications HCS161MS GROUP (NOTES SUB- CONDITIONS GROUPS TEMPERATURE 9 10, 11 +125 9 10, 11 +125 9 ...

Page 5

... PDA Interim Test III (Postburn-In) PDA Final Test Group A (Note 1) Group B Subgroup B-5 Subgroup B-6 Group D NOTE: 1. Alternate Group A testing in accordance with Method 5005 of MIL-STD-883 may be exercised. Specifications HCS161MS (NOTES 1, 2) CONDITIONS TEMPERATURE GROUP B SUBGROUP DELTA LIMIT 5 5 -15 Hour TABLE 6. APPLICABLE SUBGROUPS ...

Page 6

... Each pin except VCC and GND will have a resistor of 1KΩ ± 5% for dynamic burn-in. OPEN NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ± 5% for irradiation testing. Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures. Specifications HCS161MS TABLE 7. TOTAL DOSE IRRADIATION TEST PRE RAD POST RAD ...

Page 7

... Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. • The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative. HCS161MS 100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition hrs ...

Page 8

... Intersil Corporation Intersil Corporation 7585 Irvine Center Drive 2401 Palm Bay Rd. Suite 100 Palm Bay, FL 32905 Irvine, CA 92618 TEL: (321) 724-7000 TEL: (949) 341-7000 FAX: (321) 724-7946 FAX: (949) 341-7123 HCS161MS AC Load Circuit DUT TPHL CL = 50pF RL = 500Ω TTHL 80% 20% UNITS V ...

Page 9

... Metallization Mask Layout P0 (3) P1 (4) P2 (5) P3 (6) PE (7) NOTE: The die diagram is a generic plot from a similar HCS device intended to indicate approximate die size and bond pad location. The mask series for the HCS161 is TA14346A. HCS161MS HCS161MS CP MR VCC (2) (1) (16) (8) (9) ...

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