hcs11dmsr Intersil Corporation, hcs11dmsr Datasheet

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hcs11dmsr

Manufacturer Part Number
hcs11dmsr
Description
Rad-hard Triple 3-input And Gate
Manufacturer
Intersil Corporation
Datasheet
November 1994
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K or 1 Mega-RAD(Si)
• Dose Rate Upset >10
• Cosmic Ray Upset Immunity < 2 x 10
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
• Input Current Levels Ii
Description
The Intersil HCS11MS is a Radiation Hardened Triple 3-
Input AND Gate. A high on all inputs forces the output to a
High state.
The HCS11MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS11MS is supplied in a 14 lead Weld Seal Ceramic
flatpack (K suffix) or a Weld Seal Ceramic Dual-In-Line
Package (D suffix).
Truth Table
(Typ)
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
NOTE: L = Logic Level Low, H = Logic level High
An
H
H
H
H
L
L
L
L
INPUTS
Bn
H
H
H
H
L
L
L
L
10
RAD(Si)/s 20ns Pulse
5 A at VOL, VOH
Cn
H
H
H
H
L
L
L
L
o
C to +125
-9
OUTPUTS
Errors/Gate Day
Yn
H
o
L
L
L
L
L
L
L
C
7-135
Pinouts
Functional Diagram
(13, 5, 11)
MIL-STD-1835 DESIGNATOR CDFP3-F14, LEAD FINISH C
(2, 4, 10)
MIL-STD-1835 DESIGNATOR CDIP2-T14, LEAD FINISH C
(1, 3, 9)
GND
An
A1
B1
A2
B2
C2
Y2
Bn
Cn
HCS11MS
14 PIN CERAMIC DUAL-IN-LINE
14 PIN CERAMIC FLAT PACK
GND
A1
B1
A2
B2
C2
Y2
1
2
3
4
5
6
7
Triple 3-Input AND Gate
1
2
3
4
5
6
7
TOP VIEW
TOP VIEW
Radiation Hardened
14
13
12
11
10
9
8
14
13
12
10
11
9
8
VCC
C1
Y1
C3
B3
A3
Y3
File Number
(12, 6, 8)
VCC
C1
Y1
C3
B3
A3
Y3
Yn
3048

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hcs11dmsr Summary of contents

Page 1

... NOTE Logic Level Low Logic level High CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 Pinouts MIL-STD-1835 DESIGNATOR CDIP2-T14, LEAD FINISH C -9 Errors/Gate Day +125 C MIL-STD-1835 DESIGNATOR CDFP3-F14, LEAD FINISH C ...

Page 2

... All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...

Page 3

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL Input to Yn TPHL VCC = 4.5V Input to Yn TPLH VCC = 4.5V NOTES: 1. All voltages referenced to device GND measurements assume RL = 500 , CL = ...

Page 4

TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) PARAMETERS SYMBOL Data to Output TPHL VCC = 4.5V TPLH VCC = 4.5V NOTES: 1. All voltages referenced to device GND measurements assume RL = 500 , CL = ...

Page 5

TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS OPEN GROUND 10, 11, 13 STATIC BURN-IN II TEST CONNECTIONS (Note DYNAMIC BURN-IN I TEST CONNECTIONS (Note ...

Page 6

Die Characteristics DIE DIMENSIONS mils 2.20 x 2.24mm METALLIZATION: Type: AlSi Å Å Metal Thickness: 11k 1k GLASSIVATION: Type: SiO 2 Å Å Thickness: 13k 2.6k DIE ATTACH: Material: Silver Epoxy WORST CASE CURRENT DENSITY ...

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