hcs240ms Intersil Corporation, hcs240ms Datasheet

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hcs240ms

Manufacturer Part Number
hcs240ms
Description
Rad-hard Octal Buffer/line Driver, Three-state
Manufacturer
Intersil Corporation
Datasheet
September 1995
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Features
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
• Dose Rate Survivability: >1 x 10
• Dose Rate Upset >10
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
• Input Current Levels Ii
Description
The Intersil HCS240MS is a Radiation Hardened Inverting
Octal Buffer/Line Driver, Three-State, with two active-low
output enables.
The HCS240MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS240MS is supplied in a 20 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
HCS240DMSR
HCS240KMSR
HCS240D/Sample
HCS240K/Sample
HCS240HMSR
Bit-Day (Typ)
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
PART NUMBER
10
RAD (Si)/s 20ns Pulse
5 A at VOL, VOH
TEMPERATURE RANGE
12
o
C to +125
RAD (Si)/s
-55
-55
o
o
C to +125
C to +125
+25
+25
+25
o
o
o
o
C
C
C
C
2
/mg
-9
o
o
C
C
Errors/
1
Pinouts
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
Octal Buffer/Line Driver, Three-State
GND
BO4
BO3
BO2
BO1
SCREENING LEVEL
AI1
AI2
AI3
AI4
AE
HCS240MS
MIL-STD-1835 CDFP4-F20, LEAD FINISH C
MIL-STD-1835 CDIP2-T20, LEAD FINISH C
FLATPACK PACKAGE (FLATPACK)
20 LEAD CERAMIC DUAL-IN-LINE
20 LEAD CERAMIC METAL SEAL
METAL SEAL PACKAGE (SBDIP)
GND
BO4
BO3
BO2
BO1
AI1
AI2
AI3
AI4
AE
10
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
10
TOP VIEW
TOP VIEW
Radiation Hardened
20 Lead SBDIP
20 Lead Ceramic Flatpack
20 Lead SBDIP
20 Lead Ceramic Flatpack
Die
20
19
18
17
16
15
14
13
12
11
20
19
18
17
16
15
14
13
12
11
Spec Number
File Number
PACKAGE
VCC
BE
AO1
BI4
AO2
BI3
AO3
BI2
AO4
BI1
VCC
BE
AO1
BI4
AO2
BI3
AO3
BI2
AO4
BI1
518837
3562.1

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hcs240ms Summary of contents

Page 1

... The HCS240MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCS240MS is supplied lead Ceramic flatpack (K suffi SBDIP Package (D suffix). Ordering Information PART NUMBER TEMPERATURE RANGE ...

Page 2

... Functional Diagram AO1 AI1 H = High Voltage Level, L =Low Voltage Level X = Immaterial, Z =High Impedance HCS240MS AO2 AO3 AO4 BO1 BO2 AI2 AI3 AI4 BI1 BI2 TRUTH TABLE INPUTS OUTPUT ...

Page 3

... VIL = 1.35V, (Note 3) NOTES: 1. All voltages reference to device GND. 2. Force/Measure functions may be interchanged. 3. For functional tests, VO 4.0V is recognized as a logic “1”, and VO Specifications HCS240MS Reliability Information Thermal Resistance SBDIP Package 10mA Ceramic Flatpack Package . . . . . . . . . . . ...

Page 4

... The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics. Specifications HCS240MS GROUP (NOTES 1, 2) ...

Page 5

... All voltages referenced to device GND. 2. For functional tests, VO 4.0V is recognized as a logic “1”, and VO TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25 PARAMETER ICC IOL/IOH IOZ Specifications HCS240MS (NOTE 1) CONDITIONS TEMPERATURE 0.5V is recognized as a logic “0”. GROUP B SUBGROUP DELTA LIMIT ...

Page 6

... Each pin except VCC and GND will have a series resistor of 680 OPEN 12, 14, 16, 18 NOTE: Each pin except VCC and GND will have a resistor of 47K Subgroup 2, sample size is 4 dice/wafer 0 failures. Specifications HCS240MS TABLE 6. APPLICABLE SUBGROUPS METHOD GROUP A SUBGROUPS 100%/5004 ...

Page 7

... Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. • The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative. HCS240MS 100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition hrs ...

Page 8

... Three-State High Timing Diagrams VIH INPUT VS VSS TPZH VOH VT OUTPUT VOZ THREE-STATE HIGH VOLTAGE LEVELS PARAMETER HCS VCC 4.50 VIH 4.50 VS 2.25 VT 2.25 VW 3.60 GND 0 HCS240MS Propagation Delay Load Circuit DUT TPHL TTHL 80% 20% UNITS Three-State High Load Circuit DUT TPHZ VW UNITS ...

Page 9

... Three-State Low Timing Diagrams VIH INPUT VS VSS TPZL VOZ VT OUTPUT VOL THREE-STATE LOW VOLTAGE LEVELS PARAMETER HCS VCC 4.50 VIH 4.50 VS 2.25 VT 2.25 VW 0.90 GND 0 HCS240MS Three-State Low Load Circuit TPLZ VW UNITS VCC RL TEST DUT POINT 50pF RL = 500 Spec Number 518837 ...

Page 10

... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com HCS240MS HCS240MS 10 (18) AO1 (17) BI4 ...

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