dspic33fj128mc204 Microchip Technology Inc., dspic33fj128mc204 Datasheet - Page 251

• Manufacturer Part Number: dspic33fj128mc204
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

REGISTER 21-4:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-5
bit 4-0
R/W-0
U-0
—
DMABS<2:0>
DMABS<2:0>: DMA Buffer Size bits
111 = Reserved
110 = 32 buffers in DMA RAM
101 = 24 buffers in DMA RAM
100 = 16 buffers in DMA RAM
011 = 12 buffers in DMA RAM
010 = 8 buffers in DMA RAM
001 = 6 buffers in DMA RAM
000 = 4 buffers in DMA RAM
Unimplemented: Read as ‘0’
FSA<4:0>: FIFO Area Starts with Buffer bits
11111 = Read buffer RB31
11110 = Read buffer RB30
•
•
•
00001 = Tx/Rx buffer TRB1
00000 = Tx/Rx buffer TRB0
R/W-0
U-0
—
CiFCTRL: ECAN™ FIFO CONTROL REGISTER
C = Writable bit, but only ‘0’ can be written to clear the bit
W = Writable bit
‘1’ = Bit is set
R/W-0
U-0
—
R/W-0
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
U-0
—
FSA<4:0>
R/W-0
U-0
—
x = Bit is unknown
R/W-0
U-0
—
DS70291C-page 249
R/W-0
U-0
—
bit 8
bit 0