dspic33fj16gs404t-i-pt Microchip Technology Inc., dspic33fj16gs404t-i-pt Datasheet - Page 122

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dspic33fj16gs404t-i-pt

Manufacturer Part Number
dspic33fj16gs404t-i-pt
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 7-21:
DS70318D-page 120
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-12
bit 11
bit 10-8
bit 7
bit 6-4
bit 3
bit 2-0
Note 1: These bits are not implemented in dsPIC33FJ06GS101/102/202 devices.
U-0
U-0
Unimplemented: Read as ‘0’
U1RXIP<2:0>: UART1 Receiver Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
SPI1IP<2:0>: SPI1 Event Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
SPI1EIP<2:0>: SPI1 Error Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
T3IP<2:0>: Timer3 Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
001 = Interrupt is priority 1
000 = Interrupt source is disabled
R/W-1
R/W-1
IPC2: INTERRUPT PRIORITY CONTROL REGISTER 2
SPI1EIP<2:0>
U1RXIP<2:0>
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
R/W-0
Preliminary
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
R/W-1
R/W-1
© 2009 Microchip Technology Inc.
SPI1IP<2:0>
T3IP<2:0>
x = Bit is unknown
R/W-0
R/W-0
(1)
R/W-0
R/W-0
bit 8
bit 0

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