atxmega128a4-mu ATMEL Corporation, atxmega128a4-mu Datasheet - Page 29

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atxmega128a4-mu

Manufacturer Part Number
atxmega128a4-mu
Description
Atxmega16a4 8/16-bit Avr Xmega Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
18. TWI - Two-Wire Interface
18.1
18.2
8069A–AVR–02/08
Features
Overview
The Two-wire Interface (TWI) is a bi-directional bus with only two lines, the clock (SCL) and the
data (SDA). The protocol makes it possible to interconnect up to 128 individually addressable
devices. Since it is a multi-master bus, one or more devices capable of taking control of the bus,
can be connected.
The only external hardware needed to implement the bus is a single pull-up resistor for each of
the TWI bus lines. Mechanisms for resolving bus contention are inherent in the TWI protocol.
PORTC, PORTD, and PORTE each have one TWI. Notation of these peripherals are TWIC,
TWID, and TWIE.
3 Identical TWI peripherals
Simple yet Powerful and Flexible Communication Interface
Both Master and Slave Operation Supported
Device can Operate as Transmitter or Receiver
7-bit Address Space Allows up to 128 Different Slave Addresses
Multi-master Arbitration Support
Up to 400 kHz Data Transfer Speed
Slew-rate Limited Output Drivers
Noise Suppression Circuitry Rejects Spikes on Bus Lines
Fully Programmable Slave Address with General Call Support
Address Recognition Causes Wake-up when in Sleep Mode
I
2
C and System Management Bus (SMBus) compliant
ATxmega A4
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