mn103001g Panasonic Corporation of North America, mn103001g Datasheet

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mn103001g

Manufacturer Part Number
mn103001g
Description
Microcomputers/controllers
Manufacturer
Panasonic Corporation of North America
Datasheet
1
Type
Command ROM (× × × × × 64-bit)
Data RAM (× × × × × 32-bit)
Package
Minimum Instruction
Execution Time
Interrupts
Timer Counter
Serial Interface
I/O Pins
MN103001G
I/O
Output
Input
• RESET • IRQ × 8 • NMI • Timer × 18 • SIF × 8 • WDT • A/D • System error
Timer counter 0 to 3: 32-bit × 1
Timer counter 4 to 7: 32-bit × 1 (interval timer, event count, timer output, PWM output, interrupt)
Timer counter 8 to B: 32-bit × 1
*: each of timer counters 0 to 3, 4 to 7, and 8 to B can be changed to an 8-, 16-, or 24-bit timer counter.
Timer counter 10: 16-bit × 1
Timer counter 11: 16-bit × 1 (interval timer, event count, toggle output, interrupt)
Timer counter 12: 16-bit × 1 (same functions as those of timer counter 11)
Timer counter 13: 16-bit × 1 (same functions as those of timer counter 11)
Watchdog timer: 16- to 25-bit × 1-ch.
Serial 0: 7-, 8-bit × 1 (clock synchronous, start-stop synchronous, I
Serial 1, 2: 7-, 8-bit × 2 (clock synchronous mode)
Serial 3: 7-, 8-bit × 1 (start-stop synchronous mode)
53
15
4
(interval timer, event count, timer output, interrupt, clock source for serial I/F, A/D conversion trigger)
(interval timer, event count, timer output, PWM output, interrupt, clock source for serial I/F)
(interval timer, event count, PWM output, toggle output (2 lines), interrupt, input capture (2 lines), one-shot
output)
• Common use
• Common use
• Common use
Clock source ····················· IOCLK; IOCLK/8; IOCLK/32; external clock input; underflow of timer counter
Interrupt source ················ underflow of timer counter 0, 1, 2, 3
Clock source ····················· IOCLK; IOCLK/8; IOCLK/32; external clock input; underflow of timer counter
Interrupt source ················ underflow of timer counter 4, 5, 6, 7
Clock source ····················· IOCLK; IOCLK/8; IOCLK/32; external clock input; underflow of timer counter
Interrupt source ················ underflow of timer counter 8, 9, A, B
Clock source ····················· IOCLK; IOCLK/8; IOCLK/32; external clock input; underflow of timer counter
Interrupt source ················ overflow of timer counter 10; coincidence with compare capture (2 lines) or at
Clock source ····················· IOCLK; IOCLK/8; IOCLK/32; external clock input; underflow of timer counter
Interrupt source ················ underflow of timer counter
Clock source ····················· (clock synchronous mode, start-stop synchronous mode)
capture
IOCLK; underflow of timer counter; external clock
(I
IOCLK; underflow of timer counter
2
C mode)
17 ns (at 3.0 V to 3.6 V, 60 MHz)
LQFP100-P-1414
MN103001G
128 K-byte
8 K-byte
*Lead-free
2
C mode)
MAF00002DEM

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mn103001g Summary of contents

Page 1

... Clock source ····················· (clock synchronous mode, start-stop synchronous mode) IOCLK; underflow of timer counter; external clock mode) IOCLK; underflow of timer counter 53 • Common use 15 • Common use 4 • Common use MN103001G 128 K-byte 8 K-byte *Lead-free 2 C mode) MAF00002DEM ...

Page 2

... IDD1 CKSEL pin = Hi level At internal = 60 MHz Output open VDD , PVDD , AVDD = 3 VDD or VSS IDD4 fosc = Oscillation stopped Output open Symbol Condition VREF+ = 3.3 V A/D conversion clock = 5 MHz MN103001G Limit min typ max 180 100 (Ta = −20°C to +70°C) Limit min typ max 10 ± ...

Page 3

... Flash Memory Built-in Type Type Command ROM (× 64-bit) Data RAM (× 32-bit) Minimum instruction execution time Package 3 MN103001G LQFP100-P-1414 *Lead-free * VDD2 for MN103001G and VPP for MN1030F01K MN1030F01K 256 K-byte 8 K-byte 25 ns ( MHz) LQFP100-P-1414 AVDD 50 VREFH 49 ...

Page 4

... MAF00002DEM MN103001G 4 ...

Page 5

Request for your special attention and precautions in using the technical information and (1) If any of the products or technical information described in this book exported or provided to non-residents, the laws and regulations of the ...

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