mn103001g Panasonic Corporation of North America, mn103001g Datasheet
mn103001g
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mn103001g Summary of contents
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... Clock source ····················· (clock synchronous mode, start-stop synchronous mode) IOCLK; underflow of timer counter; external clock mode) IOCLK; underflow of timer counter 53 • Common use 15 • Common use 4 • Common use MN103001G 128 K-byte 8 K-byte *Lead-free 2 C mode) MAF00002DEM ...
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... IDD1 CKSEL pin = Hi level At internal = 60 MHz Output open VDD , PVDD , AVDD = 3 VDD or VSS IDD4 fosc = Oscillation stopped Output open Symbol Condition VREF+ = 3.3 V A/D conversion clock = 5 MHz MN103001G Limit min typ max 180 100 (Ta = −20°C to +70°C) Limit min typ max 10 ± ...
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... Flash Memory Built-in Type Type Command ROM (× 64-bit) Data RAM (× 32-bit) Minimum instruction execution time Package 3 MN103001G LQFP100-P-1414 *Lead-free * VDD2 for MN103001G and VPP for MN1030F01K MN1030F01K 256 K-byte 8 K-byte 25 ns ( MHz) LQFP100-P-1414 AVDD 50 VREFH 49 ...
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... MAF00002DEM MN103001G 4 ...
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Request for your special attention and precautions in using the technical information and (1) If any of the products or technical information described in this book exported or provided to non-residents, the laws and regulations of the ...