mb95f204h Fujitsu Microelectronics, Inc., mb95f204h Datasheet - Page 51

• Manufacturer Part Number: mb95f204h
• Description: F2mc-8fx Mb95200h/210h Series
• Manufacturer: Fujitsu Microelectronics, Inc.

DS07-12623-1E
Sampling is executed at the falling edge of the sampling clock*
(ESCR register : SCES bit = 1, ECCR register : SCDE bit = 1)
*1:There is a function used to choose whether the sampling of reception data is performed at a rising edge or a
*2: The serial clock delay function is a function that delays the output signal of the serial clock for half clock.
*3: See “ (2) Source Clock/Machine Clock” for t
Serial clock cycle time
SCK ↓→ SOT delay time
Valid SIN → SCK↑
SCK↑→ valid SIN hold time
SOT → SCK↑ delay time
falling edge of the serial clock.
SCK
SOT
SIN
Parameter
2.4 V
0.8 V
0.8 V
0.2 V
Symbol Pin name
t
t
t
t
t
SOVHI
SLOVI
SCYC
IVSHI
SHIXI
CC
CC
t
SOVHI
t
IVSHI
SCK
SCK, SOT
SCK, SIN
SCK, SIN
SCK, SOT
MCLK
.
2.4 V
operating output pin :
(V
C
L
CC
Internal clock
= 80 pF + 1 TTL
Condition
= 5.0 V ± 10%, V
MB95200H/210H Series
t
SHIXI
0.8 V
1
, and serial clock delay is enabled*
t
SCYC
0.8 V
0.2 V
CC
CC
t
SLOVI
SS
2.4 V
0.8 V
t
MCLK
= 0.0 V, T
5 t
Min
− 95
*
MCLK
⎯
3
0
+ 190
*
3
2.4 V
Value
A
= − 40 °C to + 85 °C)
4 t
Max
+ 95
MCLK
⎯
⎯
⎯
*
3
2
.
Unit
ns
ns
ns
ns
ns
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