z8f0822 ZiLOG Semiconductor, z8f0822 Datasheet - Page 77
z8f0822
Manufacturer Part Number
z8f0822
Description
High Performance 8-bit Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z8F0822.pdf
(264 pages)
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Table 29. IRQ0 Enable High Bit Register (IRQ0ENH)
Table 30. IRQ0 Enable Low Bit Register (IRQ0ENL)
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
IRQ1 Enable High and Low Bit Registers
7
Reserved
Reserved
7
Reserved—Must be 0
T1ENH—Timer 1 Interrupt Request Enable High Bit
T0ENH—Timer 0 Interrupt Request Enable High Bit
U0RENH—UART 0 Receive Interrupt Request Enable High Bit
U0TENH—UART 0 Transmit Interrupt Request Enable High Bit
I2CENH—I
SPIENH—SPI Interrupt Request Enable High Bit
ADCENH—ADC Interrupt Request Enable High Bit
Reserved—Must be 0
T1ENL—Timer 1 Interrupt Request Enable Low Bit
T0ENL—Timer 0 Interrupt Request Enable Low Bit
U0RENL—UART 0 Receive Interrupt Request Enable Low Bit
U0TENL—UART 0 Transmit Interrupt Request Enable Low Bit
I2CENL—I
SPIENL—SPI Interrupt Request Enable Low Bit
ADCENL—ADC Interrupt Request Enable Low Bit
Table 31
Registers
Interrupt Request 1 Register. Priority is generated by setting bits in each register.
6
T1ENH
T1ENL
describes the priority control for IRQ1. The IRQ1 Enable High and Low Bit
(Table 32
6
2
2
C Interrupt Request Enable Low Bit
C Interrupt Request Enable High Bit
5
and
T0ENH
T0ENL
5
Table
33) form a priority encoded enabling for interrupts in the
4
U0RENH
U0RENL
4
FC1H
FC2H
R/W
R/W
0
0
3
U0TENH
U0TENL
3
2
Z8 Encore! XP
I2CENH
I2CENL
2
Product Specification
1
SPIENH
SPIENL
1
®
Interrupt Controller
F0822 Series
0
ADCENH
ADCENL
0
64
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