cop8sce9 National Semiconductor Corporation, cop8sce9 Datasheet - Page 39

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cop8sce9

Manufacturer Part Number
cop8sce9
Description
8-bit Cmos Flash Microcontroller With 8k Memory, Virtual Eeprom And Brownout Reset
Manufacturer
National Semiconductor Corporation
Datasheet
8.0 USART
8.1 USART CONTROL AND STATUS REGISTERS
The operation of the USART is programmed through three
registers: ENU, ENUR and ENUI.
8.2 DESCRIPTION OF USART REGISTER BITS
ENU — USART CONTROL AND STATUS REGISTER (Ad-
dress at 0BA)
Bit 7
PEN
PSEL1 XBIT9/
PSEL0
(Continued)
CHL1
CHL0
ERR
FIGURE 22. USART Block Diagram
RBFL
TBMT
Bit 0
39
PEN: This bit enables/disables Parity (7- and 8-bit modes
only). Read/Write, cleared on reset.
PEN = 0
PEN = 1
PSEL1, PSEL0: Parity select bits. Read/Write, cleared on
reset.
PSEL1 = 0, PSEL0 = 0
PSEL1 = 0, PSEL1 = 1
PSEL1 = 1, PSEL0 = 0
PSEL1 = 1, PSEL1 = 1
Parity disabled.
Parity enabled.
Odd Parity (if Parity enabled)
Even Parity (if Parity enabled)
Mark(1) (if Parity enabled)
Space(0) (if Parity enabled)
20032725
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