cop8sce9 National Semiconductor Corporation, cop8sce9 Datasheet - Page 9

• Manufacturer Part Number: cop8sce9
• Description: 8-bit Cmos Flash Microcontroller With 8k Memory, Virtual Eeprom And Brownout Reset
• Manufacturer: National Semiconductor Corporation

Input Pulse Width
Output Pulse Width
USART Bit Time when using External
CKX
USART CKX Frequency when being
Driven by Internal Baud Rate Generator
Reset Pulse Width
t
Note 2: Maximum rate of voltage change must be
Note 3: Supply and IDLE currents are measured with CKI driven with a square wave Oscillator, CKO driven 180˚ out of phase with CKI, inputs connected to V
and outputs driven low but not connected to a load.
Note 4: The HALT mode will stop CKI from oscillating. Measurement of I
H and L programmed as low outputs and not driving a load; all inputs tied to V
mode entered via setting bit 7 of the G Port data register.
Note 5: Pins G6 and RESET are designed with a high voltage input network. These pins allow input voltages
biased at voltages
be limited to
Note 6: If timer is in high speed mode, the minimum time is 1 MCLK. If timer is not in high speed mode, the minimum time is 1 t
Note 7: Absolute Maximum Ratings should not be exceeded.
Note 8: V
C
Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Interrupt Input High Time
Interrupt Input Low Time
Timer 1 Input High Time
Timer 1 Input Low Time
Timer 2 Input High Time (Note 6)
Timer 2 Input Low Time (Note 6)
Timer 2 Output High Time
Timer 2 Output Low Time
= instruction cycle time.
cc
must be valid and stable before G6 is raised to a high voltage.
<
14V. WARNING: Voltages in excess of 14V will cause damage to the pins. This warning excludes ESD transients.
>
Parameter
V
CC
(the pins do not have source current when biased at a voltage below V
AC Electrical Characteristics (0˚C
<
0.5 V/ms.
Conditions
DD
HALT is done with device neither sourcing nor sinking current; with A. B, G0, G2–G5,
CC
9
; A/D converter and clock monitor and BOR disabled. Parameter refers to HALT
T
A
+70˚C) (Continued)
CC
). These two pins will not latch up. The voltage at the pins must
periods
6 CKI
Min
150
150
1
1
1
1
1
1
1
>
V
CC
and the pins will have sink current to V
Typ
C
.
Max
2
MCLK or t
MCLK or t
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Units
MHz
CC
ns
ns
t
t
t
t
t
C
C
C
C
C
when
CC
C
C