cop87l88fh National Semiconductor Corporation, cop87l88fh Datasheet - Page 24

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cop87l88fh

Manufacturer Part Number
cop87l88fh
Description
8-bit Cmos Otp Microcontrollers With 16k Memory, Comparators, Usart And Hardware Multiply/divide
Manufacturer
National Semiconductor Corporation
Datasheet
www.national.com
MDR1 (xx98)
MDR2 (xx99)
MDR3 (xx9A)
MDR4 (xx9B)
MDR5 (xx9C)
Multiply/Divide
Interrupts
Introduction
Each device supports thirteen vectored interrupts. Interrupt
sources include Timer 0, Timer 1, Timer 2, Timer 3, Port L
Wakeup, Software Trap, MICROWIRE/PLUS, and External
Input.
All interrupts force a branch to location 00FF Hex in program
memory. The VIS instruction may be used to vector to the
appropriate service routine from location 00FF Hex.
Register Name
(Address)
Unused
Multiplier
Low Byte of
Multiplicand
High Byte of
Multiplicand
Before Operation
(Continued)
Multiplication Assignment
FIGURE 16. Interrupt Block Diagram
TABLE 5. Multiply/Divide Registers
Unchanged
Low Byte of Result
Middle Byte of Result
High Byte of Result
Unchanged
After Operation
24
The Software trap has the highest priority while the default
VIS has the lowest priority.
Each of the 13 maskable inputs has a fixed arbitration rank-
ing and vector.
Figure 16 shows the Interrupt Block diagram.
Low Byte of Dividend
Middle Byte of Dividend
High Byte of Dividend
Low Byte of Divisor
High Byte of Divisor
Before Operation
Division Assignment
Low Byte of Result
High Byte of Result
Undefined
Low Byte of Divisor
High Byte of Divisor
DS101135-20
After Operation

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