cop87l88fh National Semiconductor Corporation, cop87l88fh Datasheet - Page 6

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cop87l88fh

Manufacturer Part Number
cop87l88fh
Description
8-bit Cmos Otp Microcontrollers With 16k Memory, Comparators, Usart And Hardware Multiply/divide
Manufacturer
National Semiconductor Corporation
Datasheet
www.national.com
Input Capacitance
Load Capacitance on D2
Input Offset Voltage
Input Common Mode Voltage Range
Low Level Output Current
Instruction Cycle Time (t
Inputs
Output Propagation Delay
MICROWIRE Setup Time (t
MICROWIRE Hold Time (t
MICROWIRE Output Propagation Delay (t
Input Pulse Width (Note 7)
Reset Pulse Width
DC Electrical Characteristics
AC Electrical Characteristics
Note 2: Maximum rate of voltage change must be less than 0.5V/ms.
Note 3: Supply current is measured after running 2000 cycles with a square wave CKI input, CKO open, inputs at rails and outputs open.
Note 4: The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations. Measurement of I
sinking current; with L, C, and G0–G5 programmed as low outputs and not driving a load; all outputs programmed low and not driving a load; all inputs tied to V
clock monitor and comparators disabled. Parameter refers to HALT mode entered via setting bit 7 of the G Port data register. Part will pull up CKI during HALT in crys-
tal clock mode.
Note 5: Pins G6 and RESET are designed with a high voltage input network. These pins allow input voltages greater than V
to V
(typical). These two pins will not latch up. The voltage at the pins must be limited to less than 14V. WARNING: Voltages in excess of 14V will cause damage to the
pins. This warning excludes ESD transients.
Note 6: Parameter characterized but not tested.
Note 7: t
−40˚C
−40˚C
V
Comparators AC and DC Characteristics
Crystal Resonator or External
R/C Oscillator
t
t
t
SO, SK
All Others
Interrupt Input High Time
Interrupt Input Low Time
Timer 1, 2, 3 Input High Time
Timer 1, 2, 3 Input Low Time
CC
SETUP
HOLD
PD1
CC
= 5V, −40˚C
, t
when biased at voltages greater than V
PD0
c
= Instruction cycle time.
T
T
A
A
Parameter
Parameter
+85˚C unless otherwise specified
+85˚C unless otherwise specified
Parameter
T
A
c
)
UWH
+85˚C
UWS
) (Note 6)
) (Note 6)
CC
(the pins do not have source current when biased at a voltage below V
(Note 6)
(Note 6)
UPD
0.4V
V
OL
)
= 0.4V
Conditions
(Continued)
V
IN
Conditions
2.7V
4.5V
2.7V
4.5V
4.5V
2.7V
4.5V
2.7V
R
4.5V
2.7V
4.5V
2.7V
V
V
V
CC
CC
CC
L
= 2.2k, C
V
CC
4.5V
4.5V
4.5V
V
V
V
V
V
V
V
V
V
V
V
V
Conditions
− 1.5V
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
6
<
<
<
<
<
L
4.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
4.0V
4.5V
4.5V
= 100 pF
4.5V
4.5V
Min
Min
0.4
1.6
Min
200
500
150
2.5
1.0
7.5
3.0
60
20
56
1
1
1
1
1
DD
Typ
±
Typ
10
HALT is done with device neither sourcing or
CC
). The effective resistance to V
Typ
CC
and the pins will have sink current
V
CC
Max
±
1000
Max
25
− 1.5
7
Max
1.75
220
DC
DC
DC
DC
0.7
2.5
1
CC
Units
Units
Units
is 750
mV
mA
pF
pF
µs
µs
µs
µs
ns
ns
ns
ns
µs
µs
µs
µs
ns
ns
ns
µs
V
t
t
t
t
c
c
c
c
CC
;

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