cop8tab9 National Semiconductor Corporation, cop8tab9 Datasheet - Page 22

• Manufacturer Part Number: cop8tab9
• Description: 8-bit Cmos Flash Microcontroller With 2k Byte Or 4k Byte Memory
• Manufacturer: National Semiconductor Corporation

www.national.com
11.0 In-System Programming
should be placed into the address registers of COP8TAC9
devices. Registers ISPADHI and ISPADLO are cleared to 00
on Reset.
Note: The actual memory address of the Option Register is
0x0FFF (hex), however the MICROWIRE/PLUS ISP routines
require the address FFFF (hex) to be used to read the
Option Register when the Flash Memory is secured.
11.3.2 ISP Read Data Register
The Read Data Register (ISPRD) contains the value read
back from a read operation. This register is undefined on
Reset.
(Continued)
Addr 15 Addr 14
Bit 7
Addr 7
Bit7
R
Bit 7
Bit 7
7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 6
Bit6
Addr 6
Bit 6
Bit 6
TABLE 6. High Byte of ISP Address
TABLE 7. Low Byte of ISP Address
TABLE 8. ISP Read Data Register
R/W
6
0
0
0
0
0
0
0
0
0
1
1
1
1
1
Addr 13
Bit 5
Addr 5
Bit5
Bit 5
Bit 5
Addr 12 Addr 11 Addr 10
Addr 4
Bit 4
Bit 4
Bit 4
Bit4
R/W
ISPADLO
ISPADHi
5
0
0
0
0
0
0
0
0
1
0
0
0
0
1
ISPRD
Bit 3
Addr 3
Bit3
Bit 3
Bit 3
R/W
Bit 2
Addr 2
Bit2
Bit 2
Bit 2
4
0
0
0
0
0
0
1
1
0
0
0
0
1
0
Register Bit
TABLE 10. PGMTIM Register Format
Addr 9
Addr 1
Bit 1
Bit 1
Bit 1
Bit1
R/W
3
0
0
0
0
0
1
0
1
1
0
1
1
1
1
Addr 8
Addr 0
Bit 0
Bit 0
Bit 0
Bit0
PGMTIM
R/W
22
2
0
0
0
1
1
0
0
0
0
1
0
1
0
1
11.3.3 ISP Write Data Register
The Write Data Register (ISPWR) contains the data to be
written into the specified address. This register is undeter-
mined on Reset.
11.3.4 ISP Write Timing Register
The Write Timing Register (PGMTIM) is used to control the
width of the timing pulses for write and erase operations. The
value to be written into this register is dependent on the
frequency of CKI and is shown in Table 10 . This register
must be written before any write or erase operation can take
place. It only needs to be loaded once, for each value of CKI
frequency. The MICROWIRE/PLUS ISP routine that is resi-
dent in the boot ROM requires that this register be defined
prior to any access to the Flash memory. Refer to Section
11.7 MICROWIRE/PLUS ISP for more information on avail-
able ISP commands. On Reset, the PGMTIM register is
loaded with the value that corresponds to 10 MHz frequency
for CKI. The best choice for value of PGMTIM will center the
operating frequency in the CKI Frequency Range.
Bit 7
Bit7
R/W
Bit 6
Bit6
1
0
0
1
0
1
1
0
0
0
0
0
1
1
0
TABLE 9. ISP Write Data Register
Bit 5
Bit5
R/W
0
0
1
0
0
1
0
0
0
0
1
1
0
0
0
Bit 4
Bit4
ISPWR
Bit 3
Bit3
CKI Frequency Range
1.025 MHz–2.05 MHz
11.25 MHz–22.5 MHz
6.75 MHz–13.5 MHz
3.75 MHz–7.5 MHz
625 kHz–1.25 MHz
125 kHz–250 kHz
200 kHz–400 kHz
275 kHz–550 kHz
425 kHz–850 kHz
50 kHz–100 kHz
75 kHz–150 kHz
1.5 MHz–3 MHz
2.5 MHz–5 MHz
25 kHz–50 kHz
Bit 2
Bit2
Bit 1
Bit1
Bit 0
Bit0