km416v4100c Samsung Semiconductor, Inc., km416v4100c Datasheet

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km416v4100c

Manufacturer Part Number
km416v4100c
Description
16bit Cmos Dynamic With Fast Page Mode
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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Part Number:
km416v4100cS-6
Manufacturer:
SAMSUNG
Quantity:
1 000
KM416V4000C, KM416V4100C
This is a family of 4,194,304 x 16 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory
cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -5 or -6), power consumption(Normal or Low power) are
optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Fur-
thermore, Self-refresh operation is available in L-version. This 4Mx16 Fast Page Mode DRAM family is fabricated using Samsung s
advanced CMOS process to realize high band-width, low power consumption and high reliability.
FEATURES
• Part Identification
• Refresh Cycles
* Access mode & RAS only refresh mode
• Performance Range
• Active Power Dissipation
KM416V4000C*
KM416V4100C
Speed
CAS-before-RAS & Hidden refresh mode
- KM416V4000C/C-L(3.3V, 8K Ref.)
- KM416V4100C/C-L(3.3V, 4K Ref.)
: 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.)
: 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.)
-45
-5
-6
Speed
-45
-5
-6
Part
NO.
45ns
50ns
60ns
t
RAC
Refresh
cycle
12ns
13ns
15ns
t
8K
4K
324
288
252
CAC
8K
4M x 16bit CMOS Dynamic RAM with Fast Page Mode
Normal
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.
110ns
64ms
80ns
90ns
t
Refresh time
RC
468
432
396
Unit : mW
4K
128ms
31ns
35ns
40ns
L-ver
t
PC
DESCRIPTION
(A0~A11)*1
(A0~A9)*1
UCAS
LCAS
A0~A12
RAS
A0~A8
W
FUNCTIONAL BLOCK DIAGRAM
• Fast Page Mode operation
• 2CAS Byte/Word Read/Write operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• Fast parallel test mode capability
• LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in Plastic TSOP(II) packages
• +3.3V 0.3V power supply
Note) *1 : 4K Refresh
Control
Clocks
Row Address Buffer
Col. Address Buffer
Refresh Counter
Refresh Control
Refresh Timer
VBB Generator
Column Decoder
4,194,304 x 16
Memory Array
Row Decoder
Cells
CMOS DRAM
Vcc
Vss
Data out
Data out
Data in
Data in
Lower
Buffer
Lower
Buffer
Upper
Buffer
Upper
Buffer
OE
DQ15
DQ0
DQ7
DQ8
to
to

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km416v4100c Summary of contents

Page 1

... Self-refresh operation is available in L-version. This 4Mx16 Fast Page Mode DRAM family is fabricated using Samsung s advanced CMOS process to realize high band-width, low power consumption and high reliability. FEATURES • Part Identification - KM416V4000C/C-L(3.3V, 8K Ref.) - KM416V4100C/C-L(3.3V, 4K Ref.) • Active Power Dissipation Speed 8K -45 ...

Page 2

... KM416V4000C, KM416V4100C PIN CONFIGURATION (Top Views) •KM416V40(1)00CS DQ0 DQ15 3 48 DQ1 DQ14 4 47 DQ2 DQ13 5 46 DQ3 DQ12 DQ4 DQ11 8 43 DQ5 DQ10 9 42 DQ6 DQ9 10 41 DQ7 DQ8 11 40 N.C N LCAS ...

Page 3

... KM416V4000C, KM416V4100C ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative Voltage on V supply relative Storage Temperature Power Dissipation Short Circuit Output Current * Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...

Page 4

... KM416V4000C, KM416V4100C DC AND OPERATING CHARACTERISTICS Symbol Power Speed -45 I Don t care CC1 Normal I Don t care CC2 L -45 I Don t care CC3 -45 I Don t care CC4 Normal I Don t care CC5 L -45 I Don t care CC6 I L Don t care CC7 I L Don t care CCS Operating Current (RAS and UCAS, LCAS, Address cycling @ ...

Page 5

... KM416V4000C, KM416V4100C CAPACITANCE (T = Parameter Input capacitance [A0 ~ A12] Input capacitance [RAS, UCAS, LCAS, W, OE] Output capacitance [DQ0 - DQ15] AC CHARACTERISTICS ( Test condition : V =3.3V 0.3V, Vih/Vil=2.2/0.7V, Voh/Vol=2.0/0.8V CC Parameter Random read or write cycle time Read-modify-write cycle time Access time from RAS Access time from CAS ...

Page 6

... KM416V4000C, KM416V4100C AC CHARACTERISTICS (Continued) Parameter Refresh period (Normal) Refresh period (L-ver) Write command set-up time CAS to W delay time RAS to W delay time Column address to W delay time CAS precharge W delay time CAS set-up time (CAS -before-RAS refresh) CAS hold time (CAS -before-RAS refresh) ...

Page 7

... KM416V4000C, KM416V4100C TEST MODE CYCLE Parameter Random read or write cycle time Read-modify-write cycle time Access time from RAS Access time from CAS Access time from column address RAS pulse width CAS pulse width RAS hold time CAS hold time Column Address to RAS lead time ...

Page 8

... KM416V4000C, KM416V4100C NOTES 1. § Á An initial pause of 200 is required after power-up followed by any 8 ROR or CBR cycles before proper device operation is achieved (min) and V (max) are reference levels for measuring timing of input signals. Transition times are measured between (min) and V (max) and are assumed to be 5ns for all inputs ...

Page 9

... KM416V4000C, KM416V4100C are referenced to the earlier CAS falling edge. 13. ASC CAH t 14. is specified from the last CAS rising edge in the previous cycle to the first CAS falling edge in the next cycle referenced to the later CAS falling edge at word read-modify-write cycle. ...

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