s-817b23ay-z-g Seiko Instruments Inc., s-817b23ay-z-g Datasheet - Page 18

• Manufacturer Part Number: s-817b23ay-z-g
• Description: Super-small Package Cmos Voltage Regulator
• Manufacturer: Seiko Instruments Inc.

18
SUPER-SMALL PACKAGE CMOS VOLTAGE REGULATOR
S-817 Series
Precautions
3. Output Voltage Adjustment Circuit (Only for S817B Series (Product without short circuit protection))
• Wiring patterns for the VIN, VOUT and GND pins should be designed so that the impedance is low.
• Note that the output voltage may increase when a series regulator is used at low load current (1.0 µA or
• Generally a series regulator may cause oscillation, depending on the selection of external parts. The
• The voltage regulator may oscillate when the impedance of the power supply is high and the input
• The application conditions for the input voltage, output voltage, and load current should not exceed the
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
• SII claims no responsibility for any disputes arising out of or in connection with any infringement by
When mounting an output capacitor between the VOUT and VSS pins (C
the input between VIN and VSS pins (C
short as possible.
less).
following conditions are recommended for this IC. However, be sure to perform sufficient evaluation
under the actual usage conditions for selection, including evaluation of temperature characteristics.
capacitor is small or an input capacitor is not connected.
package power dissipation.
electrostatic protection circuit.
products including this IC of patents owned by a third party.
The output voltage can be boosted by using the configuration shown in Figure 18. The output Voltage
(V
Set the values of resistors R
(I
Capacitor C1 is effective in minimizing output fluctuation at powering on or due to power or load
fluctuation. Determine the optimum value on your actual device. But it is not also recommended to
attach a capacitor between the S-817 Series power source VIN and VSS pin or between output VOUT
and VSS pin because output fluctuation or oscillation at powering on might occur. As shown in Figure
18, a capacitor must be mounted between VIN and GND, and between VOUT and GND.
SS
O
).
Output capacitor (C
Equivalent Series Resistance (ESR) :
Input series resistance (R
) can be calculated using the following equation (V
V
O
= V
OUT(E)
× (R
V
GND
IN
L
) :
1
+ R
VIN
1
IN
C
2
and R
) :
) ÷ R
IN
S-817
Series
1
VSS
2
+ R
Seiko Instruments Inc.
so that the S-817 Series is not affected by current consumption
C1
IN
2
), the distance from the capacitors to these pins should be as
× I
0.1 µF or more
30 Ω or less
10 Ω or less
SS
Figure 18
VOUT
OUT(E)
:Effective output voltage):
R
R
1
2
L
) and a capacitor for stabilizing
C
V0
L
Rev.4.2
_00