lf3312 LOGIC Devices Incorporated, lf3312 Datasheet - Page 17

• Manufacturer Part Number: lf3312
• Description: 12-mbit Frame Buffer / Fifo
• Manufacturer: LOGIC Devices Incorporated

DEVICES INCORPORATED
LOGIC Devices Incorporated
TMS - JTAG Tap controller input
TMS controls the state of the tap controller.
TCK - JTAG clock
TCK is the used supplied clock of JTAG. It controls the flow of data and latches input data on the rising edge.
Configuration Register Map
The various 8-bit control registers may be pre-programmed with either the parallel microprocessor port
(PROGRAM=1), or through the serial microprocessor interface bus(PROGRAM=0). Changes in pre-
programming begin to affect the data path when LOAD is brought LOW. In each instance, the value in
parens () is the default state following assertion of RESET while LOAD = 0.
Instruction Register 0 (dflt = 00000000)
3:0 = ROW_LENGTH[11:8]
Instruction Register 1 (dflt = 00000000)
7:0 = ROW_LENGTH[7:0]
Instruction Register 2 (dflt = 00000000)
7:0 = ALATENCY[23:16]
Instruction Register 3 (dflt = 00000000)
7:0 = ALATENCY[15:8]
Instruction Register 4 (dflt = 00000000)
7:0 = ALATENCY[7:0]
Instruction Register 5 (dflt = 00000000)
7:0 = BLATENCY[23:16]
Instruction Register 6 (dflt = 00000000)
7:0 = BLATENCY[15:8]
Instruction Register 7 (dflt = 00000000)
7:0 = BLATENCY[7:0]
(0000: 24-bit linear map; see reg 7)
(00000000: 24-bit linear map; see reg 6)
(00000000: default = 0; see reg 9, a)
(00000000: default = 0; see reg 8, a)
(00000000: default = 0; see reg 8, 9)
(00000000)
(00000000)
(00000000)
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12-Mbit Frame Buffer / FIFO
Preliminary Datasheet
Video Imaging Product
August 8, 2006 LDS.3312 O
LF3312