lf3312 LOGIC Devices Incorporated, lf3312 Datasheet - Page 32

• Manufacturer Part Number: lf3312
• Description: 12-mbit Frame Buffer / Fifo
• Manufacturer: LOGIC Devices Incorporated

LOGIC Devices Incorporated reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and
to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current
and complete. LOGIC Devices does not assume any liability arising out of the application or use of any product or circuit described herein. In no event shall any liability exceed
the purchase price of LOGIC Devices products. LOGIC Devices products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety
applications, unless pursuant to an express written agreement with LOGIC Devices. Furthermore, LOGIC Devices does not authorize its products for use as critical components in
life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user.
DEVICES INCORPORATED
LOGIC Devices Incorporated
Speed
_
Package and Ordering Information
0°C to 70°C--Commercial Screening
AOUT
AOUT
AOUT
BOUT
BOUT
BOUT
AOUT
AOUT
AOUT
BOUT
BOUT
BOE_b
AOE_b
14
APE
11
10
8
0
5
11
5
3
0
3
8
AREN_b
BOUT
AOUT
AOUT
BOUT
BOUT
BOUT
VCCO
VCCO
VCCO
VCCO
RCLK
13
BPE
APF
10
9
4
2
4
9
1.00 REF
ACOLLIDE
BREN_b
RSET_b
AOUT
AOUT
BOUT
BOUT
VCCO
VCCO
VCCO
VCCO
VCCO
GND
12
BPF
7
1
1
6
172 Ball - Low Profile Ball Grid Array (LBGA)
BCOLLIDE BMARK_b
PADDR
RCLR_b
BSET_b
VCC
BOUT
ASET_b
VCCO
GND
GND
GND
GND
GND
GND
11
INT
7
5
AMARK_b
PADDR
PADDR
PADDR
ACLR_b
AOUT
AOUT
VCCO
GND
GND
GND
10
6
2
3
4
2
PADDR
PADDR
LOAD_b
VCC
BCLR_b
VCCO
VCCO
GND
GND
GND
9
INT
0
1
I/O VCC Pin
Core VCC Pin
Signal Pin
GND Pin
PROGRAM
VCC
PDATA
GND
BOTTOM
GND
CSB
SDA
SCL
8
LF3312BGC
INT
VIEW
7
32
CHIP_ID
VCC
PDATA
PDATA
VCCO
WEB
GND
REB
7
INT
6
5
6
CHIP_ID
CHIP_ID
CHIP_ID
PDATA
PDATA
VCCO
GND
GND
GND
GND
6
4
3
5
4
3
CHIP_ID
CHIP_ID
CHIP_ID
PDATA
PDATA
VCC
PDATA
VCCO
GND
GND
GND
AIN
5
INT
6
2
0
1
2
1
0
BIEN_b
AIEN_b
TRST_b
VCC
GND
GND
GND
GND
GND
AIN
BIN
BIN
TCK
TMS
4
INT
3
3
6
BWEN_b
AWEN_b
VCC
VCC
VCC
BIN
AIN
AIN
AIN
BIN
GND
BIN
TDO
TDI
3
BALL PAD CORNER
INT
INT
INT
11
8
4
0
1
8
12-Mbit Frame Buffer / FIFO
RESET_b
VCC
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
AIN
AIN
BIN
BIN
BIN
GND
2
INT
9
1
0
5
9
1.00 REF
AWCLK
BWCLK
VCC
AIN
AIN
BIN
GND
AIN
AIN
AIN
BIN 2
BIN
BIN
GND
Preliminary Datasheet
1
11
10
10
INT
7
5
2
4
7
Video Imaging Product
A
B
C
D
E
F
G
H
J
K
L
M
N
P
August 8, 2006 LDS.3312 O
LF3312