ICS300 Integrated Circuit System, ICS300 Datasheet - Page 2

• Manufacturer Part Number: ICS300
• Description: Qtclock Quick Turn Clock Synthesizer
• Manufacturer: Integrated Circuit System

MDS 300QT E
External Components / Crystal Selection
The ICS300/301/302 requires a 0.01µF decoupling capacitor to be connected between VDD and GND.
It must be connected close to the ICS300/301/302 to minimize lead inductance. No external power
supply filtering is required for this device. A 33 terminating resistor can be used next to the CLK and
REF pins. The total on-chip capacitance is approximately 16 pF, so a parallel resonant, fundamental mode
crystal should be used. For crystals with a specified load capacitance greater than 16 pF, crystal capacitors
can be connected from each of the pins X1 and X2 to Ground. The value (in pF) of these crystal caps
should be = (C L -16)*2, where C L is the crystal load capacitance in pF. These external capacitors are only
required for applications where the exact frequency is critical. For a clock input, connect to X1/ICLK and
leave X2 unconnected (no capacitors on either).
Key: I = Input, O = output, P = power supply connection
The specification is complete when the ICS300/301/302 QTClock Order Form accompanies this data
sheet. The order form lists the input, REF, and CLK actual frequencies, as well as any other available
options. This unique configuration is given a two character alphanumeric programming code, which must
be specified when referring to samples.
Pin Assignments
Device Configuration
Pin Descriptions
Number Number
300/1
1
2
3
4
5
6
7
8
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•[phone]tel• www.icst.com
302
1, 3
8
2
4
5
6
7
-
X1/ICLK
X1/ICLK
GND
GND
GND
Name
PDTS
VDD
GND
VDD
VDD
REF
CLK
REF
REF
DC
X2
Type Description
1
2
3
4
1
2
3
4
O
O
O
P
P
I
-
I
ICS302
ICS300
ICS301
QTClock™ Quick Turn Clock Synthesizer
Crystal connection or clock input. Clock only on ICS302.
Connect to +3.3V or +5V.
Connect to ground.
Buffered crystal oscillator output clock, or variation per REF clock options table above.
Clock output. Fixed frequency between 6 and 200 MHz programmed at factory.
Don't Connect anything to this pin.
Powers down PLL, and puts both outputs into high impedance state, when low.
Crystal connection. Leave unconnected for clock input.
8
7
6
5
8
7
6
5
ICLK
PDTS
DC
CLK
X2
PDTS
DC
CLK
2
REF Clock Options
Reference/2
Reference
CLK/2
REF
ICS300/ICS301/ICS302
Off
Oscillator frequency divided by two
Output stopped low. Lowest jitter
CLK frequency divided by two
Buffered oscillator output
Comments
Revision 111000