xr16m2551im48 Exar Corporation, xr16m2551im48 Datasheet - Page 3
![no-image](/images/manufacturer_photos/0/2/243/exar_corporation_sml.jpg)
xr16m2551im48
Manufacturer Part Number
xr16m2551im48
Description
High Performance Low Voltage Duart With 16-byte Fifo And Powersave Feature
Manufacturer
Exar Corporation
Datasheet
1.XR16M2551IM48.pdf
(51 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
xr16m2551im48-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Pin Description
REV. 1.0.2
PIN DESCRIPTIONS
DATA BUS INTERFACE
(R/W#)
(IRQ#)
(VCC)
IOW#
CSA#
(CS#)
CSB#
N
IOR#
INTA
(A3)
D7
D6
D5
D4
D3
D2
D1
D0
A2
A1
A0
AME
32-QFN
P
18
19
20
32
31
30
29
28
27
14
12
22
IN
2
1
7
8
HIGH PERFORMANCE LOW VOLTAGE DUART WITH 16-BYTE FIFO AND POWERSAVE FEATURE
#
48-TQFP
P
26
27
28
48
47
46
45
44
19
15
10
30
IN
11
3
2
1
#
T
I/O
YPE
O
I
I
I
I
I
Address data lines [2:0]. These 3 address lines select one of the internal registers
in UART channel A/B during a data bus transaction.
Data bus lines [7:0] (bidirectional).
When 16/68# pin is HIGH, the Intel bus interface is selected and this input
becomes read strobe (active low). The falling edge instigates an internal read cycle
and retrieves the data byte from an internal register pointed by the address lines
[A2:A0], puts the data byte on the data bus to allow the host processor to read it on
the rising edge.
When 16/68# pin is LOW, the Motorola bus interface is selected and this input is
not used and should be connected to VCC.
When 16/68# pin is HIGH, it selects Intel bus interface and this input becomes write
strobe (active low). The falling edge instigates the internal write cycle and the rising
edge transfers the data byte on the data bus to an internal register pointed by the
address lines.
When 16/68# pin is LOW, the Motorola bus interface is selected and this input
becomes read (HIGH) and write (LOW) signal.
When 16/68# pin is HIGH, this input is chip select A (active low) to enable channel
A in the device.
When 16/68# pin is LOW, this input becomes the chip select (active low) for the
Motorola bus interface.
When 16/68# pin is HIGH, this input is chip select B (active low) to enable channel
B in the device.
When 16/68# pin is LOW, this input becomes address line A3 which is used for
channel selection in the Motorola bus interface. Input LOW selects channel A and
HIGH selects channel B.
When 16/68# pin is HIGH for Intel bus interface, this output becomes channel A
interrupt output. The output state is defined by the user through the software set-
ting of MCR[3]. INTA is set to the active mode and OP2A# output to LOW when
MCR[3] is set to HIGH. INTA is set to the three state mode and OP2A# to HIGH
when MCR[3] is set to LOW. See MCR[3].
When 16/68# pin is LOW for Motorola bus interface, this output becomes device
interrupt output (active low, open drain). An external pull-up resistor is required for
proper operation.
3
D
ESCRIPTION
XR16M2551