xr17c152im Exar Corporation, xr17c152im Datasheet - Page 61

• Manufacturer Part Number: xr17c152im
• Description: 5v Pci Bus Dual Uart
• Manufacturer: Exar Corporation

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5.0 programming Examples ....................................................................................................... 49
ABSOLUTE MAXIMUM RATINGS .................................................................................. 50
ELECTRICAL CHARACTERISTICS................................................................................ 50
PACKAGE DIMENSIONS ................................................................................................ 58
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F
F
F
F
T
F
F
F
T
T
T
T
T
T
T
T
T
F
F
F
F
F
F
F
IGURE
IGURE
IGURE
IGURE
ABLE
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
4.3 R
4.4 A
4.5 I
4.6 I
4.7 UART CHANNEL CONFIGURATION REGISTERS AND ADDRESS DECODING. ....................... 31
4.8 R
5.1 U
DC ELECTRICAL CHARACTERISTICS FOR 5V SIGNALING .............................................................. 50
AC ELECTRICAL CHARACTERISTICS
10: A
11: UART CHANNEL CONFIGURATION REGISTERS........................................................................................................... 32
12: UART CHANNEL CONFIGURATION REGISTERS DESCRIPTION. S
13: I
14: T
15: P
16: A
17: 16 S
18: S
19: UART RESET CONDITIONS ............................................................................................................................................. 48
4.3.1 Receive Holding Register (RHR) - Read-Only ......................................................................................... 27
4.3.2 Receiver Operation in non-FIFO Mode ................................................................................................... 27
4.3.3 Receiver Operation with FIFO.................................................................................................................. 28
4.8.1 Receive Holding Register (RHR) - Read-Only ......................................................................................... 34
4.8.2 Transmit Holding Register (THR) - Write-Only......................................................................................... 34
4.8.3 Baud Rate Generator Divisors (DLL and DLM) - Read/Write................................................................... 34
4.8.4 Interrupt Enable Register (IER) - Read/Write........................................................................................... 34
IER versus Receive FIFO Interrupt Mode Operation ......................................................................................... 34
IER versus Receive/Transmit FIFO Polled Mode Operation.............................................................................. 34
4.8.5 Interrupt Status Register (ISR) - Read-Only............................................................................................. 35
4.8.6 FIFO Control Register (FCR) - Write-Only ............................................................................................... 37
4.8.7 Line Control Register (LCR) - Read/Write................................................................................................ 39
4.8.8 Modem Control Register (MCR) - Read/Write.......................................................................................... 40
4.8.9 Line Status Register (LSR) - Read/Only .................................................................................................. 41
4.8.10 Modem Status Register (MSR) - Read-Only .......................................................................................... 42
4.8.11 Modem Status Register (MSR) - Write-Only .......................................................................................... 43
4.8.12 SCRATCH PAD REGISTER (SPR) - Read/Write .................................................................................. 44
4.8.13 FEATURE CONTROL REGISTER (FCTR) - Read/Write ..................................................................... 44
4.8.14 Enhanced Feature Register (EFR) - Read/Write.................................................................................... 45
4.8.15 TXCNT[7:0]: Transmit FIFO Level Counter - Read-Only ....................................................................... 47
4.8.16 TXTRG [7:0]: Transmit FIFO Trigger Level - Write-Only........................................................................ 47
4.8.17 RXCNT[7:0]: Receive FIFO Level Counter - Read-Only ........................................................................ 47
4.8.18 RXTRG[7:0]: Receive FIFO Trigger Level - Write-Only ......................................................................... 47
NFRARED
NTERNAL
10. T
11. T
12. R
13. R
14. A
15. I
16. I
17. PCI B
18. D
19. D
20. D
21. 5V PCI B
22. T
23. R
UTOMATIC
ECEIVER
EGISTERS
NLOADING
NTERRUPT
RANSMIT AND
UTO
ARITY SELECTION
UTO
OFTWARE
NFRARED
NTERNAL
RANSMITTER
RANSMIITTER
UTO
RANSMIT
ECEIVER
ECEIVER
EVICE
EVICE
EVICE
ECEIVE
ELECTABLE
RTS/CTS
RS485 H
RTS/DTR
US
L
C
C
C
M
......................................................................................................................................... 27
D
OOPBACK
C
ONFIGURATION AND
ONFIGURATION REGISTERS
ONFIGURATION
US
H
L
....................................................................................................................................... 34
T
S
O
O
ODE
F
D
ATA
R
ONFIGURATION
OOP
RANSMIT
LOW
OURCE AND
ARDWARE
ATA
PERATION IN NON
PERATION IN
C
ECEIVE
R
O
ALF
LOCK
O
H
R
OR
ECEIVE
PERATION IN NON
B
I
PERATION IN
............................................................................................................................... 30
YSTERESIS
C
AND
EADY
NTERRUPT AT
................................................................................................................................................................ 40
ACK
-
ONTROL
DUPLEX
DTR/DSR F
............................................................................................................................................................ 56
D
CTS/DSR F
F
........................................................................................................................ 31
ATA
D
I
FIFO T
NTERRUPT AT
UNCTION IN EACH
P
ATA
R
(RTS/CTS
FIFO
RIORITY
S
EGISTERS
E
D
F
PACE
L
UNCTIONS
NCODING AND
IRECTION
FIFO
-FIFO M
EVELS
UART R
U
RIGGER
T
AND
LOW
SING THE
RIGGER
-FIFO M
R
L
LOW
EVEL
EGISTERS
AND
, UART R
F
W
, UART R
C
LOW
T
ODE
EGISTERS
ONTROL
C
HEN
L
RIGGER
C
............................................................................................................................... 46
OR
ONTROL
F
............................................................................................................................. 36
EVEL
ONTROL
L
UART C
LOW
ODE
EVEL
C
R
FOR
......................................................................................................................... 27
T
DTR/DSR) F
ONTROL
ECEIVE
RIGGER
S
R
S
EGISTERS AND
.................................................................................................................... 26
EGISTERS AND
C
PECIAL
S
L
ELECTION
EAD AND
.................................................................................................................. 57
ONTROL
EVEL
5V SIGNALING ................................................................ 51
R
ELECTION
D
O
EAD
HANNEL
ELAY FROM
PERATION
D
M
T
......................................................................................................... 57
ATA
ABLE
ODE
O
R
II
W
PERATION FOR A
M
................................................................................................... 38
ECEIVE
.................................................................................................. 31
D
................................................................................................. 28
RITE OPERATION
ODE
-D
................................................................................................ 28
ECODING
LOW
T
R
............................................................................................. 29
T
IS
RANSMIT
ECEIVE
.......................................................................................... 26
RANSMIT
S
ELECTED
C
FIFO D
ONTROL
................................................................................. 30
D
D
HADED BITS ARE ENABLED BY
-
ATA
TO
ATA
B
YTE OR
........................................................................ 45
........................................................................ 52
-R
B
ATA WITH
B
ECEIVE
URST
URST
O
PERATION
DWORD.............................................. 53
R
W
......................................................... 43
EAD
RITE
S
O
TATUS
PERATION
O
5V PCI BUS DUAL UART
PERATION
............................... 28
......................... 49
EFR B
............................... 55
............................ 54
IT
-4................ 33
XR17C152
REV. 1.2.0