xr21b1411 Exar Corporation, xr21b1411 Datasheet
xr21b1411
Available stocks
Related parts for xr21b1411
xr21b1411 Summary of contents
Page 1
... JANUARY 2011 GENERAL DESCRIPTION The XR21B1411 (B1411 enhanced Universal Asynchronous Receiver and Transmitter (UART) with a USB interface. The USB interface is fully compliant to Full Speed USB 2.0 specification that supports 12 Mbps USB data transfer rate. The USB interface also supports USB suspend, resume and remote wakeup operations ...
Page 2
... XR21B1411 ENHANCED 1-CH FULL-SPEED USB UART F 1. XR21B1411 B D IGURE LOCK IAGRAM Internal Programmable Oscillator (6MHz – 48MHz) USBD+ USB Slave Interface USBD- USB OTP Descriptors 5V VCC GND IGURE IN UT IAGRAM GND USBD- USBD+ VCC ORDERING INFORMATION P N ART UMBER ...
Page 3
... CDC-ACM driver. I/O USB port differential data positive input. This pin has internal pull-up resistor compliant to USB 2.0 specification. The ESD protection on this pin is +/-15 kV HBM. I/O USB port differential data negative input. The ESD protection on this pin is +/-15 kV HBM. 3 XR21B1411 D ESCRIPTION See See See ...
Page 4
... XR21B1411 ENHANCED 1-CH FULL-SPEED USB UART Pin Description 16-QFN N AME LOWPOWER VBUS_SENSE 2 NC Power / Ground Signals 12 VIO_REF 16 VCC 13 GND Center GND Pad N : Pin type: I=Input, O=Output, I/O= Input/output, PWR=Power, OD=Output Open Drain. OTE T YPE The LOWPOWER pin will be asserted whenever it is not safe to draw the amount of current requested in the Device Maximum Power field of the Configuration Descriptor ...
Page 5
... The TSR shifts the data out onto the TX output pin at the selected baud rate. The transmitter sends ENHANCED 1-CH FULL-SPEED USB UART D CDC-ACM D EGISTER EFAULTS WITH N OTES Hardware flow control RTS / CTS flow control DTR configured as an output (in addition to RTS which is set by GPIO_MODE) RI, CD and DSR are interrupt sensitive, i.e. can cause a USB interrupt to be generated 5 XR21B1411 RIVER ...
Page 6
... XR21B1411 ENHANCED 1-CH FULL-SPEED USB UART the start bit followed by the data bits (starting with the LSB), inserts the proper parity-bit if enabled, and adds the stop-bit(s). The transmitter can be configured for data bits with or without parity or 9 data bits without parity. ...
Page 7
... TXB RTSA# CTSB# TXA RXB CTSA# RTSB# ON OFF 7 ON OFF 8 Restart 6 Suspend 9 RTS High RTS Low 5 Threshold Threshold 7 XR21B1411 Figure 4): Remote UART UARTB Transmitter Auto CTS Monitor Receiver FIFO Trigger Reached Auto RTS Trigger Level FIFO 12 Trigger Level RTSCTS1 ...
Page 8
... XR21B1411 ENHANCED 1-CH FULL-SPEED USB UART 1.3.4.2 Automatic DTR/DSR Hardware Flow Control Auto DTR/DSR hardware flow control behaves the same as the Auto RTS/CTS hardware flow control described above except that it uses the DTR# and DSR# signals. GPIO3 and GPIO2 become DTR# and DSR#, respectively, when GPIO_MODE[2:0] = ’010’ and FLOW_CONTROL[2:0] = ’001’. ...
Page 9
... The OTP memory contains user programmable locations for customer vendor and product ID and device attributes. Table 11 lists all of the OTP memory contents. ENHANCED 1-CH FULL-SPEED USB UART See ”Section 3.2.1.11, USB_ATTRIBUTES (Read / Write OTP)” XR21B1411 ...
Page 10
... XR21B1411 ENHANCED 1-CH FULL-SPEED USB UART 2.0 USB CONTROL COMMANDS The following table shows all of the USB Control Commands that are supported by the B1411. Commands include standard USB commands, CDC-ACM commands and custom Exar commands ABLE R EQUEST N AME T YPE DEV GET_STATUS 0x80 IF GET_STATUS ...
Page 11
... Number Parity None 1 = Odd 2 = Even 3 = Mark 4 = Space 1 Number Data bits ( SET_CONTROL_LINE_STATE ABLE D ESCRIPTION 11 XR21B1411 L D ENGTH ESCRIPTION 0 0 Exar custom command: set one 12-bit register val: 12-bit register value register address: see Table Exar custom register: get one 12-bit register ...
Page 12
... XR21B1411 ENHANCED 1-CH FULL-SPEED USB UART 3.0 REGISTER SET DESCRIPTION The internal register set of the B1411 controls the UART channel functionality, basic functionality of the FIFOs, OTP controls, as well as registers associated with the processing of driver commands. These registers are accessible via the USB interface using the XR_SET_REG and XR_GET_REG USB commands. Note that the UART_ENABLE register should be used to disable the UART prior to any register write and re-enable the UART following any single or sequence of register writes ...
Page 13
... XR21B1411 - GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO ...
Page 14
... XR21B1411 ENHANCED 1-CH FULL-SPEED USB UART 3.1.1.3 CDC_ACM_GPIO_MODE Register Description (Read / Write) The contents of this register, if programmed, are used to overwrite the GPIO_MODE register at address 0xC0C when a CDC command is sent from a standard CDC-ACM driver to the B1411 device. Note that this register can only be programmed from the OTP. Since a standard CDC_ACM driver is unaware of UART registers in the B1411, this register may be utilized to program UART settings from power-up ...
Page 15
... SW flow control enabled Multidrop mode - RX only after address match, TX independent. (Typically used with GPIO_MODE 3) Multidrop mode - only after address match. (Typically used with GPIO_MODE 4) “Section 1.3.5, Multidrop mode with address matching” on “Section 1.3.5, Multidrop mode with address matching” XR21B1411 ...
Page 16
... XR21B1411 ENHANCED 1-CH FULL-SPEED USB UART 3.1.1.10 ERROR_STATUS Register Description - Read-clear This register reports any historical errors that have occurred on the line such as break, framing, parity and overrun. Note that these errors cannot be directly associated with any bytes within the Rx FIFO. For diagnostic purposes, the WIDE_MODE can be enabled. In this mode, errors are real time, i.e. are directly associated with the current byte ...
Page 17
... GPIO2 and GPIO3 used for Auto DTR/DSR HW Flow Control GPIO3 GPIO4 XCVR GPIO5 used for Auto Transceiver Enable during Enable Transmit GPIO3 GPIO4 XCVR GPIO5 used for Auto Transceiver Enable after Enable address match (See FLOW_CONTROL mode 4). 17 XR21B1411 “Section 1.3, UART” ODE ESCRIPTION ...
Page 18
... XR21B1411 ENHANCED 1-CH FULL-SPEED USB UART 3.1.1.17 GPIO_STATUS Register Description (Read Only) This register reports the current state of each of the GPIO pins. 3.1.1.18 GPIO_INT_MASK Register Description (Read / Write) Dictates whether a change in GPIO pin state causes the device to generate a USB interrupt packet. In either case, the GPIO status register will still report the pin's state when read, and if an interrupt packet is formed due to other interrupt trigger, the interrupt packet will contain the current state of the pin ...
Page 19
... ENHANCED 1-CH FULL-SPEED USB UART ATA IELD OF TANDARD NTERRUPT D ESCRIPTION USTOMIZED NTERRUPT ACKET D ESCRIPTION Reserved (0) bGPIO5 (RTS) bGPIO4 (CTS) bGPIO3 (DTR) bGPIO0 (RI) Reserved (0) bGPIO2 (DSR) bGPIO1 (CD) Reserved (0) bOverRun bParity bFraming bRingSignal (RI) bBreak bTxCarrier (DSR) bRxCarrier (CD) 19 XR21B1411 P ACKET V S XAR ENDOR PECIFIC ...
Page 20
... XR21B1411 ENHANCED 1-CH FULL-SPEED USB UART 3.1.1.20 PIN_PULLUP_EN Register Description (Read / Write) PIN_PULLUP_EN[5:0]: GPI0[5:0] Enables internal pullup feature on the selected GPIO pins Logic 0 = Disable pullup on the corresponding pin. Logic 1 = Enable pullup on the corresponding pin - Caution: Do not enable pulldown simultaneously PIN_PULLUP_EN[6]: UART Rx Enables internal pullup feature on the UART Rx pin Logic 0 = Disable pullup on the corresponding pin ...
Page 21
... This register is automatically set to logic ’1’ for baud rates below 40961 bps. Logic 0 = Receive data is not from Rx FIFO until bMaxPacketSize (normally 64 bytes) or timeout (3 characters) has been reached. (Note: When the CDC-ACM driver is used, the bMaxPacketSize becomes 63 bytes.) Logic 1 = Receive data is forwarded from Rx FIFO immediately upon receipt. ENHANCED 1-CH FULL-SPEED USB UART 21 XR21B1411 ...
Page 22
... XR21B1411 ENHANCED 1-CH FULL-SPEED USB UART RX_FIFO_LOW_LATENCY[11:1]: Reserved These bits are reserved and should remain ’0’. 3.1.1.28 WIDE_MODE (Read / Write) WIDE_MODE[0]: EN Logic 0 = Normal ( bit data) mode Logic 1 = Wide mode - See “Section 1.3.1.1, Wide mode Transmit” on page 6 mode Receive” on page 6 ...
Page 23
... ENHANCED 1-CH FULL-SPEED USB UART T 12 ABLE ORE LOCK IVIDER D ESCRIPTION Core Clock = CLOCK / 1 (48 MHz) Core Clock = CLOCK / 2 (24 MHz) Core Clock = CLOCK / 4 (12 MHz) Core Clock = CLOCK / 8 (6 MHz) Reserved - Using these settings may cause functional dam- age to the B1411 device 23 XR21B1411 ...
Page 24
... XR21B1411 ENHANCED 1-CH FULL-SPEED USB UART These bits are reserved and should remain ’0’.OTP Valid (Read / Write OTP) 3.2.1.5 OTP _Valid (Read / Write OTP) This register holds the VALID flag for the OTP override values. These include the USB device and configuration descriptor overrides and default line coding overrides ...
Page 25
... ADDRESS VALUE (Read / Write OTP) ADDRESS_VALUE[7:0]: Value The Address Value feature can be used to further customize the power-up defaults for the XR21B1411 before a software driver begins to initialize the device. For example, the manufacturer, product and serial number strings can be customized using the address value feature. However, if improperly used, this feature may cause permanent functional damage in the device ...
Page 26
... XR21B1411 ENHANCED 1-CH FULL-SPEED USB UART 4.0 ELECTRICAL CHARACTERISTICS P ARAMETER Vcc Supply Voltage All I/O pins (except USB Interface signals) USB Interface Signals DC ELECTRICAL CHARACTERISTICS - POWER CONSUMPTION -40 NLESS OTHERWISE NOTED S P YMBOL ARAMETER I Power Supply Current CC I Power Supply Current CC I Power Supply Current ...
Page 27
... DrvZ I Open short current Current OSC ENHANCED 1-CH FULL-SPEED USB UART 4.4V - 5.25V IMITS -0.3 0.8 2.0 5.5 0 0.3 2.8 3 38.5 27 XR21B1411 U C NITS ONDITIONS External 1.5 K Ohm to 3.6V on USBD- pin V External 15 K Ohm to GND on USBD- pin Ohms mA 1 USBD+ and USBD- ...
Page 28
... XR21B1411 ENHANCED 1-CH FULL-SPEED USB UART PACKAGE DIMENSIONS (16 PIN QFN - 0.9 Note: The control dimension is the millimeter column SYMBOL INCHES MILLIMETERS MIN MAX MIN 0.031 0.035 0.80 0.000 0.002 0.00 0.000 0.008 0.00 0.114 0.122 2.90 0.065 0.069 1.65 0.008 0.012 ...
Page 29
... EXAR Corporation is adequately protected under the circumstances. Copyright 2010 EXAR Corporation Datasheet January 2011. Send your UART technical inquiry with technical details to hotline: uarttechsupport@exar.com. Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited. ENHANCED 1-CH FULL-SPEED USB UART D ESCRIPTION NOTICE 29 XR21B1411 ...