xr20m1172 Exar Corporation, xr20m1172 Datasheet - Page 22

• Manufacturer Part Number: xr20m1172
• Description: Two Channel I2c/spi Uart With 64-byte Fifo
• Manufacturer: Exar Corporation

XR20M1172
TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO
The M1172 supports low voltage system designs, hence, a sleep mode is included to reduce its power
consumption when the chip is not actively used.
All of these conditions must be satisfied for both channels of the M1172 to enter sleep mode:
The M1172 stops its crystal oscillator to conserve power in the sleep mode. User can check the XTAL2 pin for
no clock output as an indication that the device has entered the sleep mode.
The M1172 resumes normal operation by any of the following:
If the M1172 is awakened by any one of the above conditions, it will return to the sleep mode automatically
after all interrupting conditions have been serviced and cleared. If the M1172 is awakened by the modem
inputs, a read to the MSR is required to reset the modem inputs. In any case, the sleep mode will not be
entered while an interrupt is pending. The M1172 will stay in the sleep mode of operation until it is disabled by
setting IER bit-4 to a logic 0.
If the serial clock, serial data, and modem input lines remain steady when the M1172 is in sleep mode, the
maximum current will be in the microamp range as specified in the DC Electrical Characteristics on
A word of caution: owing to the starting up delay of the crystal oscillator after waking up from sleep mode, the
first few receive characters may be lost. The number of characters lost during the restart also depends on your
operating data rate. More characters are lost when operating at higher data rate. Also, it is important to keep
RX input idling HIGH or “marking” condition during sleep mode to avoid receiving a “break” condition upon the
restart. This may occur when the external interface transceivers (RS-232, RS-485 or another type) are also put
to sleep mode and cannot maintain the “marking” condition. To avoid this, the designer can use a 47k-100k
ohm pull-up resistor on the RX input pin.
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no interrupts pending (ISR bit-0 = 1)
sleep mode of both channels are enabled (IER bit-4 = 1)
modem inputs are not toggling (MSR bits 0-3 = 0)
RX input pin is idling HIGH
a receive data start bit transition (HIGH to LOW)
a data byte is loaded to the transmitter, THR or FIFO
a change of logic state on any of the modem or general purpose serial inputs: CTS#, DSR#, CD#, RI#
Sleep Mode with Auto Wake-Up
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