71m6543h-igtr/f Maxim Integrated Products, Inc., 71m6543h-igtr/f Datasheet - Page 78
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71m6543h-igtr/f
Manufacturer Part Number
71m6543h-igtr/f
Description
Energy Meter Ic
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.71M6543H-IGTRF.pdf
(157 pages)
- Current page: 78 of 157
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71M6543F/H Data Sheet
3.2.3 SLP Mode
The SLP mode may be commanded by the MPU whenever main system power is absent by asserting the
SLEEP bit (I/O RAM 0x28B2[7]). The purpose of the SLP mode is to consume the least power while still
maintaining the RTC, temperature compensation of the RTC, and the non-volatile portions of the I/O RAM.
In SLP mode, the V3P3D pin is disconnected, removing all sources of leakage from VBAT and V3P3SYS.
The non-volatile memory domain and the basic functions, such as temperature sensor, oscillator, and
RTC, are powered by the VBAT_RTC input. In this mode, the I/O configuration bits, LCD configuration
bits, and NV RAM values are preserved and RTC and oscillator continue to run. This mode can be exited
only by system power-up or one of the wake methods described in
3.4 Wake-Up
Behavior.
If the SLEEP bit is asserted when V3P3SYS pin power is present (i.e., while in MSN mode), the
71M6543F/H enters SLP mode, resetting the internal WAKE signal, at which point the 71M6543F/H
begins the standard wake from sleep procedures as described in
3.4 Wake-Up
Behavior.
After the transition from SLP mode to MSN or BRN mode the PC is at 0x0000, the XRAM is in an
undefined state, and the I/O RAM is only partially preserved (see the description of I/O RAM states in
5.2). The non-volatile sections of the I/O RAM are preserved unless RESET goes high.
78
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