pt7a4408 Pericom Technology Inc, pt7a4408 Datasheet - Page 11

• Manufacturer Part Number: pt7a4408
• Description: T1/e1/oc3 System Synchronizer
• Manufacturer: Pericom Technology Inc

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Using the above method, the jitter attenuation can be calcu-
lated for all combinations of inputs and outputs based on the
three jitter transfer functions provided.
Note that the resulting jitter transfer functions for all combina-
tions of inputs (8kHz, 1.544MHz, 2.048MHz) and outputs
(8kHz, 1.544MHz, 2.048MHz, 4.096MHz, 8.192MHz,
16.384MHz, 6.312MHz, 19.44MHz) for a given input signal
(jitter frequency and jitter amplitude) are the same.
Since intrinsic jitter is always present, jitter attenuation will
appear to be lower for small input jitter signals than for large
ones. Consequently, accurate jitter transfer function measure-
ments are usually made with large input jitter signals (e.g.,
75% of the specified maximum jitter tolerance).
Frequency Accuracy: Frequency accuracy is defined as the
absolute tolerance of an output clock signal when it is not
locked to an external reference, but is operating in a free run-
ning mode. For the PT7A4408/4408L, the Free-Run accuracy
is equal to the Master Clock (OSCi) accuracy.
Absolute Maximum Ratings
Recommended Operating Conditions
PT0106(09/02)
Table 4. Recommended Operating Conditions
Storage Temperature ...................................................... -65
Ambient Temperature with Power Applied ...................... -40
Supply Voltage to Ground Potential (Inputs & V
Supply Voltage to Ground Potential (Outputs & D/O Only) .. -0.3 to 7.0V
DC Input Voltage .................................................................. -0.3 to 7.0V
DC Output Current ...................................................................... 120mA
Power Dissipation ....................................................................... 900mW
J
J
E1o
y S m
y S m
y S m
y S m
y S
V
T1o
T
C
A
m
= J
C
= J
T1o
T1i
x (
x 10
1UIT1
1UIE1
(
u S
-A
2 0
u S
O
p p
)
p
p p
) = J
= 20 x 10
r e
y l
y l
i t a
D
D
D
D
D
V
T1o
V
s e
s e
s e
s e
s e
g n
o
o
a t l
r c
r c
r c
x (
r c
r c
a t l
e T
p i
p i
p i
p i
p i
e g
e g
(
m
644ns
488ns
i t
i t
i t
i t
i t
-18
2 0
f
n o
n o
n o
n o
n o
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f
r o
r o
)
a r
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4 4
4 4
u t
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8 0
e r
8 0
L
CC
Only) ...... -0.3 to 7.0V
O
O
o
p
e T
e T
e T
v
C to +150
e T
e T
r e
o
r e
C to +85
11
t s
t s
t s
t s
t s
i t a
R
Lock Range: If the PT7A4408/4408L DPLL is already in a
state of synchronization (“lock”) with the incoming reference
signal, it is able to track this signal to maintain lock as its
frequency varies over a certain range, called the Lock Range.
The size of Lock Range is related to the range of the Digitally
Controlled Oscillators and is equal to 230ppm minus the ac-
curacy of the master clock (OSCi). For example, a 32ppm mas-
ter clock results in a Lock Range of 198ppm.
Capture Range: The PT7A4408/4408L DPLL is not at present
in a state of synchronization (lock) with the incoming reference
signal, it is able to initiate (acquire) lock only if the signal’s fre-
quency is within a certain range, called the Capture Range. For
any PLL, no portion of the Capture Range can fall outside the
Lock Range, and, in general, the Capture Range is more narrow
than the Lock Range. However, owing to the design of its Phase
Detector, the PT7A4408/4408L’s Capture Range is equal to its
Lock Range.
Phase Slope: Phase slope is measured in seconds per second
and is the rate at which a given signal changes phase with
respect to an ideal signal of constant frequency. The given
signal is typically the output signal. The ideal signal is of
constant frequency and is nominally equal to the value of the
final output signal or final input signal.
C
C
C
g n
C
C
e
o c
o
o
o
o
o
d n
d n
d n
d n
d n
C
m
n o
o
o
m
t i
t i
t i
t i
t i
C
C
o i
o i
o i
o i
o i
i d
e
d n
s n
s n
s n
s n
s n
o i t
T1/E1/OC3 System Synchronizer
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions above those indicated in the operational sec-
tions of this specification is not implied. Exposure
to absolute maximum rating conditions for ex-
tended periods may affect reliability.
d e
s n
M n i
M n i
M n i
M n i
M
4
3
-
0 4
5 .
0 .
n i
T p y
T p y
T p y
T p y
T
PT7A4408/4408L
5
3
5 2
p y
0 .
3 .
Data Sheet
M x a
M x a
M x a
M x a
M
5
3
5 8
5 .
6 .
x a
U
U
U
U
U
n
n
n
o
n
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V
V
C
Ver:0
s t i
s t i
s t i
s t i
s t i