d2-45057 Intersil Corporation, d2-45057 Datasheet
d2-45057
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d2-45057 Summary of contents
Page 1
... Intelligent Digital Amplifier PWM Controller and Audio Processor D2-45057, D2-45157 The D2-45057 and D2-45157 devices are complete System-on-Chip (SoC) Class-D digital audio amplifiers. Combining high performance integrated Power Stages along with an optimized Audio Processor feature set and PWM Controller, these devices offer a complete, powerful, and very cost effective audio solution for high volume and cost-critical products ...
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... D2-45157-QR-T (Note 2) D2-45157-QR SRS WOW/HD™ NOTES: 1. The D2-45057, D2-45157 support audio processing algorithms for the D2Audio™ SoundSuite™, and SRS WOW/HD™ audio enhancement features. Algorithm support of these enhancements is device-dependent. Refer to specific part number for desired feature support. 2. Please refer to TB347 for details on reel specifications ...
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... DSP............................................................... 18 Clock and PLL ................................................. 18 Timers ...........................................................18 Audio Outputs ................................................. 18 Output Power Stages ....................................... 18 Output Options ............................................... 19 PWM Audio Outputs ......................................... 19 3 D2-45057, D2-45157 Control and Operation ..................................... 19 Control Register Summary ............................... 2-Wire Control Interface ............................ 19 Reading and Writing Control Registers............... 19 Control Interface Address Spaces ..................... 20 Storing Parameters to EEPROM......................... 20 Serial Peripheral Interface (SPI) ...
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... Pulse Width Internal Pull-Up Resistance to PWMVDD (for nERROR0-3, OCFG, nPDN) Digital I/O Supply Pin Voltage, Current Core Supply Pins 4 D2-45057, D2-45157 Thermal Information Thermal Resistance (Typical QFN Package (Notes Maximum Storage Temperature . . . . . . . . -55°C to +150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below http://www ...
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... Thermal Shut-Down Hysteresis (Power Stages) NOTES: 8. All input pins except XTALI. 9. Input leakage applies to all pins except XTALO. 10. Power-down is with device in reset and clocks stopped. 5 D2-45057, D2-45157 = +25°C, HVDD[A:D]/VDDHV = 24V, CVDD = PLLVDD = 1.8V ±5%, RVDD = PWMVDD = 3.3V TEST CONDITIONS Active Current Power-Down Current ...
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... SDI SDIN Setup to SCLK Rising - (SDIN SDI SDIN Hold from SCLK Rising - (SDIN) h SCLK t LRCLK h LRCK SDIN FIGURE 1. SERIAL AUDIO INTERFACE PORT TIMING 6 D2-45057, D2-45157 T = +25°C, HVDD[A:D]/VDDHV = 24V, CVDD = PLLVDD = 1.8V ±5%, A SYMBOL r DS(ON) t PDNOFF t PDNON P OUT P OUT P OUT ...
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... Data is clocked in as valid on next XTALI rising edge after SCL goes low. 12. Limits established by characterization and not production tested. t SCLx whigh t SCLx wlow SCLx t STA s SDAx (INPUT) SDAx (OUTPUT) 7 D2-45057, D2-45157 T = +25°C, CVDD = PLLVDD = 1.8V ±5%, RVDD = PWMVDD = 3.3V A DESCRIPTION SDAx h t SDAx s t STAx h t ...
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... MOSI Setup to Clock Edge S t MOSI Hold From Clock Edge H t nSS Minimum Width WI SCK(CPHA = 1, CPOL = 0) SCK(CPHA = 0, CPOL = 0) MOSI MISO(CPHA = 0) nSS 8 D2-45057, D2-45157 T = +25°C, CVDD = PLLVDD = 1.8V ±5%, RVDD = PWMVDD = 3.3V A DESCRIPTION T = +25°C, CVDD = PLLVDD = 1.8V ±5%, RVDD = PWMVDD = 3.3V A DESCRIPTION ...
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... SDA 3 SCL 4 SCLK 5 SDIN 6 LRCK 7 MCLK 8 CVDD 9 CGND 10 RGND 11 RVDD 12 TEMPREF/SCK 13 nMUTE/TIO1 14 VOL1/MISO 15 TEMP1/MOSI 16 SPDIFRX D2-45057, D2-45157 D2-45057, D2-45157 (68 LD QFN) TOP VIEW OUTA 50 HSBSA 49 HSBSB 48 OUTB ...
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... Internally connected to PWMVDD. Reference pin for temperature monitor and SPI clock. At de-assertion of device reset, pin operates as SPI clock with 8mA drive strength. Upon internal D2-45057, D2-45157 firmware execution, pin becomes temperature monitor reference. Mute signal output. Low active: mute condition drives pin low. Output is a 16mA driver. ...
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... D2-45057, D2-45157 firmware, and dependent on which of the 4 amplifier configurations is enabled. PWM protection input. Input has hysteresis. Protection monitoring functionality of pin is controlled by internal D2-45057, D2-45157 firmware, and dependent on which of the 4 amplifier configurations is enabled. PWM protection input. Input has hysteresis. Protection monitoring functionality of pin is controlled by internal D2-45057, D2-45157 firmware, and dependent on which of the 4 amplifier configurations is enabled ...
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... PLLVDD P 1.8 12 D2-45057, D2-45157 Overcurrent reference analog input. Used in setting the overcurrent error detect externally- set threshold. The pin needs to be connected to a 100kΩ resistor to ground to set the overcurrent threshold according to the specified limits. High Voltage internal driver supply power. All of the HVDD[A:D] pins and the VDDHV pin connect to the system “ ...
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... D2-45057, D2-45157 Volume control pulse input and SPI slave select. At de-assertion of device reset, pin operates as SPI slave select input. Then upon internal D2-45057, D2-45157 firmware execution, pin becomes input for monitoring up/down phase pulses from volume control volume input pins.) Core ground Core power, +1 ...
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... FIGURE 4. THD vs POWER, FULL-BRIDGE 6 HVDD = 24.0V, 5 8Ω LOAD, 3. 100 200 500 FREQUENCY (Hz) FIGURE 6. FREQUENCY RESPONSE, FULL-BRIDGE 14 D2-45057, D2-45157 1.000 0.500 0.200 0.100 0.050 0.020 0.010 0.005 0.002 0.001 FIGURE 5. THD vs FREQUENCY, FULL-BRIDGE -50 -55 -60 -65 -70 -75 ...
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... AC RESPONSE DUE TO LOUDSPEAKER DC BLOCKING CAPACITOR -8 -10 - 100 200 500 1k FREQUENCY (Hz) FIGURE 10. FREQUENCY RESPONSE, HALF-BRIDGE 15 D2-45057, D2-45157 1.000 0.500 0.200 0.100 0.050 0.020 0.010 0.005 HVDD = 24.0V, 8Ω LOAD, 0.002 2.4W POWER OUT 0.001 FIGURE 9. THD vs FREQUENCY, HALF-BRIDGE ...
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... VOL0/nSS (65) PSSYNC/CFG1 (25) FIRMWARE CONFIGURATION, (ROM) SYSTEM I/O nERROR/CFG0 (24) PROTECT0 (26) PROTECTION PROTECT1 (27) INPUTS TIMERS, I/O PROTECT2 (28) FIGURE 12. D2-45057, D2-45157 FUNCTIONAL BLOCK DIAGRAM INPUT SELECTION TONE CONTROLS 5-BAND EQS MIXERS SPEAKER EQS COMPRESSOR/LIMITERS ROUTERS HIGH/LOW-PASS CROSS- OVERS ENHANCEMENT AUDIO PROCESSING ALGORITHMS (PART-NUMBER DEPENDENT) 3-BAND EQS D2AUDIO SOUNDSUITE™ ...
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... Functional Description Overview The D2-45057, D2-45157 device, shown in Figure 12 integrated System-on-Chip (SoC) audio processor and Class D digital audio amplifier. It includes digital audio input selection, signal routing, complete audio processing, PWM controllers, amplifier and protection control, and integrated power stages. Stereo I ...
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... S/PDIF Digital output. Sample Rate Converter The D2-45057, D2-45157 devices contain a 2-channel asynchronous sample rate converter (SRC) within the audio input signal flow path. This SRC is used to convert audio data input sampled at one input sample rate ...
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... This interface is usable through either an external microcontroller bus, or for communication to EEPROMs, or other compatible peripheral chips. 2 The I C interface supports normal and fast mode operation and is multi-master capable D2-45057, D2-45157 system application, it operates device, where the system controller operates as the master. ...
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... Storing Parameters to EEPROM The D2-45057, D2-45157 device has the ability to store parameters data to an EEPROM EEPROM is installed in the application, the programmable parameter data can be saved in this EEPROM. This stored data can then be recalled upon reset or power-up ...
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... Boot Modes The D2-45057, D2-45157 devices contain embedded firmware to operate the part and run the amplifier system. Parameter information that is used by the programmable settings can be written to the device after it is operational and running ...
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... These pins are implemented within the device hardware as general purpose inputs/outputs. However, their operation is not programmable, and their specific function is totally defined by the D2-45057, D2-45157 internal firmware. Functions of these pins are defined in the pin definition list, and additional detail is included within the descriptions of the functional blocks where these pins are used ...
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... The configuration defined by these pins is assigned when the D2-45057, D2-45157 device exits its reset state, when at that time, the logic status of these PSSYNC/CFG1 and nERROR/CFG0 pins are latched into internal device registers. These are shared-function pins, and after firmware begins executing, their functions are reassigned as outputs ...
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... SPI Slave Select. nSS Configuration Setting The configuration mode is assigned through two pairs of pin settings. When the D2-45057, D2-45157 device exits its reset state, the logic status of the PSSYNC/CFG1 and nERROR/CFG0 pins is latched into internal device registers. During this initialization time, these pins operate as logic inputs ...
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... Half Bridge + 1-Channel Full Bridge for Sub,+ L Line Line “11” 4-Channel Half Bridge 2.2 Bi-Amp NOTE Low Frequency High Frequency for Bi-Amp Config Half-Bridge 25 D2-45057, D2-45157 POWER STAGE OUTPUTS Left SPKR Full Bridge 2 R Right SPKR Full Bridge ...
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... Temperature monitoring provides two levels of temperature status. On-chip undervoltage detection is included for all supply voltages. Several strategies are provided in the D2-45057, D2-45157 to prevent damage from the high voltages, currents, and temperatures present in class-D amplifiers. This protection is also effective against user-induced faults such as clipping, output overload, or output shorts, including both shorted outputs or short-to-ground faults ...
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... Audio Processing The audio processing, signal flow, and system definition is defined by the D2-45057, D2-45157 device internal ROM firmware, and executed by the DSP. This firmware defines the audio flow architecture, which includes the audio processing blocks. Each of these blocks are programmable, allowing for adjustment of their audio-controlling parameters ...
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... Four output modes are available with combinations of 4- and 2-quadrant full bridge, and half bridge operation for outputs A-D. Line and subwoofer output channel assignment is also established by output mode configuration settings. FIGURE 17. D2-45057, D2-45157 AUDIO SIGNAL FLOW 5 Band Speaker ...
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... Settings provide output level adjustment from +12dB to -100dB. 29 D2-45057, D2-45157 LOUDNESS CONTOUR An individual software-controlled Loudness Contour is included for each of the 5 amplifier output channels. The Loudness Contour curve is customized to allow for ...
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... No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see 30 D2-45057, D2-45157 for a complete list of Intersil product families. D2-45057, D2-45157 www.intersil.com/askourstaff http://rel.intersil.com/reports/search.php www.intersil.com/product_tree www.intersil.com/design/quality CHANGE www ...
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... Package Outline Drawing L68.10x10C 68 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 0, 04/09 10.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW PACKAGE OUTLINE 7.70 10.00 TYPICAL RECOMMENDED LAND PATTERN 31 D2-45057, D2-45157 EXPOSED PAD 7.70 10. 0.55 ±0.10 BOTTOM VIEW 1.00 MAX 64 X 0.50 MIN 0.00 MAX 0.55 NOTES: 1 ...