pacvga105q California Micro Devices Corporation, pacvga105q Datasheet - Page 4

• Manufacturer Part Number: pacvga105q
• Description: Vga Port Companion Circuit
• Manufacturer: California Micro Devices Corporation

Specifications (cont’d)
© 2004 California Micro Devices Corp. All rights reserved.
4
SYMBOL
V
I
t
430 N. McCarthy Blvd., Milpitas, CA 95035-5112 L Tel: [phone]
V
R
t
t
V
C
R,
I
RGB
PLH
PHL
V
I
ESD
CC
OH
IN
OL
PU
IN
F
t
F
Note 1: All parameters specified over standard operating conditions unless otherwise noted.
Note 2: Measured at 1MHz. R/G/B inputs biased at 1.65V with V
Note 3: Per the IEC-61000-4-2 International ESD Standard, Level 4 contact discharge method. V
Note 4: Applicable to the SYNC buffers only. Input signals swing between 0V and 3.0V, with rise and fall times ≤ 5ns. Guaranteed by
PARAMETER
Diode Forward Voltage
Logic High Output Voltage
Logic Low Output Voltage
Input Current
V
V
Input Capacitance
Pull-up Resistance
ESD Withstand Voltage
SYNC Buffer L => H
Propagation Delay
SYNC Buffer H => L
Propagation Delay
SYNC Buffer Output Rise & Fall
Times
CC
RGB
V
teed by design and characterization
GND via a low impedance ground plane with a 0.2uF, low inductance, chip ceramic capacitor at each supply pin. ESD pulse
is applied between the applicable pins and GND. ESD pulse can be positive or negative with respect to GND. Applicable
pins are: R, G, B, HSYNC_OUT, VSYNC_OUT, DDC_CLK and DDC_DATA. The HSYNC and VSYNC inputs are ESD pro-
tected to the industry standard 2kV per the Human Body Model (MIL-STD-883, Method 3015).
correlation to buffer output drive currents.
R, G and B pins
HSYNC, VSYNC pins
HSYNC, VSYNC pins
R, G and B pins
HSYNC, VSYNC pins
DDC_DATA, DDC_CLK pins
DDC_DATA, DDC_CLK pins
CC
Supply Current
Supply Current
=5V. HSYNC and VSYNC inputs biased at V
ELECTRICAL OPERATING CHARACTERISTICS
I
I
V
CONDITIONS
I
V
V
V
inputs and outputs floating
R, G and B pins at V
inputs and outputs floating
Note 2 applies for all cases
V
V
C
R
C
R
C
R
F
OH
OL
AUX
AUX
AUX
RGB
CC
CC
L
L
L
L
L
L
= 10mA
= 50pF; V
= 500Ω; Note 4
= 50pF; V
= 500Ω; Note 4
= 50pF; V
= 500Ω; Note 4
= 4mA, V
= -4mA, V
= 5.5V; V
= 5V; V
= 3.63V, V
= 3.63V, V
= 3.3V; Note 3
= 3.63V, V
AUX
RGB
CC
CC
CC
CC
AUX
CC
or GND with V
IN
IN
= 4.5V
= 5.0V;
= 5.0V;
= 5.0V;
IN
= 3.3V;
= 4.5V
= V
= V
= GND
= V
CC
RGB
RGB
AUX
RGB
L Fax: [phone]
or GND; All
= 3.3V. DDC_CLK and DDC_DATA biased at 2.5V with
= 2.97V; All
or GND
AUX
= 3.3V and V
(SEE NOTE 1)
CC
1.62
MIN
-30
4.0
= 5V. These parameters are guaran-
±8
L
RGB
www.calmicro.com
and V
-72.5
TYP
1.8
7.0
7.0
7.0
PACVGA105
35
10
5
5
CC
must be bypassed to
MAX
1.98
15.0
15.0
100
-95
1.0
0.4
+1
+1
10
UNITS
µA
µA
µA
µA
µA
pF
pF
pF
kΩ
kV
01/28/04
ns
ns
ns
V
V
V