ht82a523r Holtek Semiconductor Inc., ht82a523r Datasheet - Page 18

• Manufacturer Part Number: ht82a523r
• Description: Ht82a523r -- Usb 2.0 Full Speed 8-bit Otp Mcu
• Manufacturer: Holtek Semiconductor Inc.

Low Voltage Reset - LVR
The microcontroller provides low voltage reset circuit in
order to monitor the supply voltage of the device. If the
supply voltage of the device is within the range
0.9V~V
tomatically reset the device internally.
The LVR includes the following specifications:
Serial Interface
Serial interface function similar to SPI (Motorola), has
four basic signals included. They are SDIA (serial data
input), SDOA (serial data output), SCKA (serial clock)
and SCSA (slave select pin). There are two serial inter-
faces. One serial interface is pin-shared with port E, and
the other serial interface is pin-shared with port C.
Two registers (SBCR and SBDR) unique to serial inter-
face provide control, status, and data storage.
Rev. 1.30
The low voltage range (0.9V~V
tained for over 1ms, otherwise, the LVR will ignore it
and do not perform a reset function.
The LVR uses the OR function with the external RES
signal to perform a chip reset.
SBCR: Serial bus control register
Bit7 (CKS) clock source selection:
0=f
1=f
Bit6 (M1), Bit5 (M0) master/slave mode and baud rate
selection
M1, M0= 00
SIO
SIO
LVR
=f
=f
SYS
SYS
, such as changing a battery, the LVR will au-
01
10
11
/4
slave mode
Master Mode, Baud Rate= f
master mode, baud rate= f
master mode, baud rate= f
LVR
) has to be main-
SIO
SIO
SIO
/16
/4
18
Bit4 (SBEN)
SBDR: Serial bus data register
Data written to SBDR
only
Data read from SBDR
Operating Mode description:
Master transmitter: clock sending and data I/O started
by writing SBDR
Master clock sending started by writing SBDR
Slave transmitter: data I/O started by clock received
Slave receiver: data I/O started by clock received
Enable: (SCSA dependent on CSEN bit)
Disable
(SCKB= 0 ) and waiting for writing data to SBDR
(TXRX buffer)
Master mode: write data to SBDR (TXRX buffer)
start transmission/reception automatically
Master mode: when data has been transferred, set
TRF
Slave mode: when an SCKA (and SCSA dependent
on CSEN) is received, data in TXRX buffer is
shifted-out and data on SDIA is shifted-in.
Disable: SCKA (SCK), SDIA, SDOA, SCSA floating
Bit3 (MLS)
Bit2 (CSEN)
able/disable (SCSA), when CSEN=0, SCSA is float-
ing.
The SCSA should be pulled high externally to avoid
malfunction.
Bit1 (WCOL)
SBDR (TXRX buffer) when data is transferred,
writing will be ignored if data is written to SBDR
(TXRX buffer) when data is transferred.
Bit0 (TRF)
used to generate an interrupt.
enable: SCKA, SDIA, SDOA, SCSA= 0
serial bus enable/disable (1/0)
MSB or LSB (1/0) shift first control bit
data transferred or data received
this bit is set to 1 if data is written to
serial bus selection signal en-
read from SBDR only
write data to TXRX buffer
HT82A523R
May 13, 2008