gs9023-cfy ETC-unknow, gs9023-cfy Datasheet - Page 5
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gs9023-cfy
Manufacturer Part Number
gs9023-cfy
Description
Embedded Audio Codec
Manufacturer
ETC-unknow
Datasheet
1.GS9023-CFY.pdf
(33 pages)
PIN DESCRIPTIONS (Continued)
GENNUM CORPORATION
40-48
49
52, 69
53
54
55
56, 57, 59-66
68
70
72-74, 77-81
83
84
85
86-89
91
NUMBER
DOUT[9:0]
ADDR[3:0]
DATA[7:0]
SYMBOL
PKT[8:0]
BUFERR
WCOUT
AOUTB
AOUTA
PKTEN
LOCK
ANCI
NC
WE
RE
CS
TYPE
N/A
I/O
I/O
I/O
O
O
O
O
O
O
I
I
I
I
I
Arbitrary data I/O bus. In Multiplex Mode, the user must input the arbitrary data
packet words starting from the secondary data identification (SDID) to the last
user data word (UDW) according to SMPTE 291M. The GS9023 internally
converts the data to 10 bits by generating the inversion bit (bit 9). The checksum
(CS) word is also generated internally. In Demultiplex Mode, the GS9023 outputs
the arbitrary data packet words starting from the SDID to the last UDW. PKT[8] is
the MSB and PKT[0] is the LSB. See Figures 9 and 13 .
Arbitrary data packet enable. In Multiplex Mode, PKTEN must be set HIGH one
PCLK cycle before Arbitrary packet data is input to the device. In Demultiplex
Mode, the output is set HIGH when outputting Arbitrary packet data. See Figures
9 and 13 .
No Connect. Do not connect these pins.
48kHz word clock for channels 1, 2, 3 and 4. Valid only when operating in
Demultiplex Mode.
Audio signal output for channels 3 and 4. The AES/EBU digital audio output is bi-
phase mark encoded. In all non-AES/EBU modes, the output is not bi-phase
mark encoded.
Audio signal output for channels 1 and 2. The AES/EBU digital audio output is bi-
phase mark encoded. In all non-AES/EBU modes, the output is not bi-phase
mark encoded.
Parallel digital video signal output. DOUT[9] is the MSB and DOUT[0] is the LSB.
Lock indicator. In Multiplex Mode, when HIGH, the video standard has been
identified, the start of a new video frame has been detected and the device is
multiplexing audio.
NOTE: LOCK will not be set HIGH unless at least one of the audio channel
enable bits is HIGH. See “CHACT” description in Table 14.
In Demultiplex Mode, when HIGH, the video standard has been identified, the
‘lock’ process selected by “ACTSEL” has been validated and the device is
demultiplexing audio. See “ACTSEL” description in Table 15.
NOTE: LOCK remains active regardless of the number of audio samples in the
video stream after ‘lock’ is achieved.
Buffer error. Indicates when an internal buffer overflow/underflow error has
occurred. Valid only when the device is configured to operate in Demultiplex
Mode.
NOTE: If an internal buffer overflow/underflow condition occurs, the GS9023
does not mute the audio output.
Host Interface data bus. DATA[7] is the MSB and DATA[0] is the LSB.
Read enable for Host Interface. Active LOW.
Write enable for Host Interface. Active LOW.
Chip select for Host Interface. Active LOW.
Host Interface address bus. ADDR[3] is the MSB and ADDR[0] is the LSB.
ANCI Selection. Valid in Demultiplex Mode only. When set HIGH, each ancillary
data packet with a DID corresponding to either the audio packet DID, the
extended audio packet DID or the arbitrary packet DID is removed from the
video signal. The data contained in the packets are output at the corresponding
pins. The various DIDs are user programmable in the internal registers and are
accessible via the Host Interface.
NOTE: When ancillary data packets are deleted, the GS9023 does not
recalculate the EDH checkwords.
When set LOW, all ancillary data packets remain in the video signal.
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DESCRIPTION
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