th71221 Melexis Company, th71221 Datasheet - Page 10
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th71221
Manufacturer Part Number
th71221
Description
Transceiver - 27 To 930mhz, Fsk/fm/ask, Multi-channel 32l Qfn 5x5 Quad
Manufacturer
Melexis Company
Datasheet
1.TH71221.pdf
(44 pages)
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Part Number:
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3
3.1
The TH71221 contains an integer-N PLL frequency synthesizer. A PLL circuit performs the frequency syn-
thesis via a feedback mechanism. The output frequency f
detector comparison frequency f
f
locked state it must be equal to the desired output frequency, divided by the feedback divider ratio N.
Fig. 2:
The output frequency of the synthesizer f
reference divider. The only constraint for the frequency output of the system is that the minimum frequency
resolution, or the channel spacing, must be equal to the PFD frequency f
frequency f
When the PLL is unlocked (e.g. during power up or during reprogramming of a new feedback divider ratio N),
the phase-frequency detector PFD and the charge pump create an error signal proportional to the phase
difference of the two input signals. This error signal is low-pass filtered through the external loop filter and
input to the VCO to control its frequency. A very low frequency resolution increases the settling time of the
PLL and reduces the ability to cancel out VCO perturbations, because the loop filter is updated every 1/f
After the PLL has locked, the VCO frequency is given by the following equation:
There are four registers available to set the VCO frequencies in receive (registers RR and NR) and in trans-
mit mode (registers RT and NT). These registers can be programmed using the Serial Control Interface in
Programmable User Mode (PUM). In case of Stand-alone User Mode (SUM), the registers are set fixed val-
ues (refer to para. 4.1.1).
The VCO frequency is equal to the carrier frequency in transmit mode. While in receive mode the VCO
frequency is offset by the intermediate frequency IF. This is because of the super-heterodyne nature of the
receive part.
39010 071221
Rev. 006
RO
of a crystal oscillator. The phase detector utilizes this signal as a reference to tune the VCO and in the
Reference
Oscillator
Functional Description
PLL Frequency Synthesizer
Integer-N PLL Frequency Synthesizer Topology
RO
and the reference divider factor R:
f
RO
Reference
Divider
f
f
R
VCO
Phase-frequency
f
=
R
R
f
.This reference frequency f
=
R
RO
Detector
N
.
f
⋅
N
f
VCO
R
RO
=
can be selected by programming the feedback divider and the
Page 10 of 44
N
Charge
⋅
Pump
f
R
.
VCO
is generated as an integer multiple of the phase
R
is generated by dividing the output frequency
Feedback
Divider
VCC
LF
FSK/FM/ASK Transceiver
R
, which is given by the reference
Loop Filter
Voltage Controlled
External
Oscillator
(1)
(2)
TH71221
27 to 930MHz
f
Data Sheet
VCO
June/08
R
.