cdb4520bms Intersil Corporation, cdb4520bms Datasheet
cdb4520bms
Related parts for cdb4520bms
cdb4520bms Summary of contents
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... Frit Seal DIP H1F Ceramic Flatpack *H6P †H6W *CD4518B Only †CD4520B Only CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 CD4518BMS, CD4520BMS CMOS Dual Up Counters Pinout CD4518BMS, CD4520BMS TOP VIEW CLOCK A ...
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Specifications CD4518BMS, CD4520BMS Absolute Maximum Ratings DC Supply Voltage Range, (VDD -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . ...
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Specifications CD4518BMS, CD4520BMS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL CONDITIONS (NOTE 1, 2) Propagation Delay TPHL1 VDD = 5V, VIN = VDD or GND Clock to Output TPLH1 Propagation Delay TPHL2 VDD = 5V, VIN = VDD or ...
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Specifications CD4518BMS, CD4520BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) PARAMETER SYMBOL Propagation Delay TPHL1 VDD = 10V Clock to Output TPLH1 VDD = 15V Propagation Delay TPHL2 VDD = 10V Reset to Output VDD = 15V Transition Time TTHL VDD ...
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Specifications CD4518BMS, CD4520BMS TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25 PARAMETER Supply Current - MSI-2 Output Current (Sink) Output Current (Source) MIL-STD-883 CONFORMANCE GROUP METHOD Initial Test (Pre Burn-In) 100% 5004 Interim Test 1 (Post Burn-In) 100% 5004 ...
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Logic Diagrams VDD VSS * ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORK * RESET 7/15 * ENABLE 2/10 * CLOCK 1/9 FIGURE 1. DECADE COUNTER (CD4518BMS) LOGIC DIAGRAM FOR ONE OF TWO IDENTICAL COUNTERS VDD VSS * ALL INPUTS ...
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Typical Performance Curves AMBIENT TEMPERATURE ( + GATE-TO-SOURCE VOLTAGE (VGS) = 15V 10V DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 3. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE ...
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Typical Performance Curves AMBIENT TEMPERATURE ( +25 A 200 SUPPLY VOLTAGE (VDD 150 100 LOAD CAPACITANCE (CL) (pF) FIGURE 9. TYPICAL TRANSITION TIME vs LOAD CAPACITANCE ...
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CLOCK INPUT VDD CLOCK ENABLE RESET CLOCK ENABLE Q1A Q2A Q3A Q4A Q1B Q2B Q3B Q4B CD4518BMS/20BMS FIGURE 13. RIPPLE CASCADING OF FOUR COUNTERS WITH POSITIVE EDGE ...
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... All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...