hsp50306 Intersil Corporation, hsp50306 Datasheet
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hsp50306
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hsp50306 Summary of contents
Page 1
... Copyright Description The HSP50306 is a 6-bit QPSK demodulator chip designed for use in high signal to noise environments which have some multipath distortion. The part recovers 2.048 MBPS data from samples of a QPSK modulated 10.7MHz or 2.1MHz carrier. The chip coherently demodulates the waveform, recovers ...
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... This signal indicates that the carrier tracking loop is locked and data on the DOUT pin should be valid. RESET 5 I This input is provided to for initialization and test. Active low. TEST 6 I This input is provided for test. Pull high for normal operation. HSP50306 16 LEAD SOIC TOP VIEW AGCOUT ...
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... Table 1 details the BER, Acquisition and Delay Performance Specifications of the HSP50306 QPSK demodulator chip, based on an input that complies with the specifications detailed in Table 2. (25.6MHz) HSP50306 26.97MHz OSC ...
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... Each pair of input bits is encoded into a phase change relative to the previous symbol. In the HSP50306, the symbol to symbol phase change is decoded into the transmitted bit pair which is multiplexed into the output data stream. ...
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... IF of the -25 version has inherently lower internal pro- cessing spectral spurs than the -27 version. Note that the receive IF for the HSP50306SC-27 is the input IF to the demod- ulator. For the HSP50306SC-25, the receive IF is 10.7MHz, but the processing is done on the spectral image at 2.1MHz. Exam- ine the spectral inversion between the 10 ...
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... NOTES: 5. Power supply current is proportional to frequency. Typical rating is 4mA/MHz. 6. Output load per test circuit and C = 40pF Not tested, but characterized at initial design and at major process/design changes. HSP50306 o Thermal Information C Thermal Resistance (Typical, Note 4) +0.5V SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... An A/D converter with a clock to data out specification of 55ns and a data hold from clock specification of 2ns will meet these requirements at an oscillator clock frequency of 26.97MHz. Intersil recommends the CA3304 or CA3306 A/D con- verters for use with the HSP50306. 10. Controlled via design or process parameters and not directly tested. Characterized upon initial design and at major process or design changes ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com HSP50306 t CL ...