uc1602i-pp-m ETC-unknow, uc1602i-pp-m Datasheet - Page 13

• Manufacturer Part Number: uc1602i-pp-m
• Description: Single-chip, Ultra-low Power Passive Matrix Lcd Controller-driver
• Manufacturer: ETC-unknow

OFF before connecting or disconnecting external
V
LCD D
C
The nominal frequency of UC1602I built-in system
clock is 166kHz, the LCD refresh frequency is
80Hz. All required components for the clock
oscillator are built-in. No external parts are
required.
D
Row and column drivers can be in either Idle
mode or Active mode, controlled by Display
Enable flag (DC[2]). When column drivers are in
idle mode, their outputs are high-impedance (open
circuit). When row drivers are in idle mode, their
outputs are connected to V
D
The naming conventions are: R x (where x=1~64)
refers to the row driver for the x-th row of pixels on
the LCD panel; RIC refers to the icon driver.
Row drivers are clustered into “even row drivers”
and “odd row drivers”, along the two sides of the
chip to enhance the symmetry of ITO layout.
The mapping of Rx to LCD pixel rows is the same
for all MR settings. When MR setting is not 11,
leave unused row drivers open.
Rev. 0.54 10/12/2001
LCD
LOCK
RIVER
RIVER
sources.
& T
M
A
RRANGEMENTS
ISPLAY
ODES
IMING
G
ENERATOR
C
ONTROLS
SS
.
D
There are three display control flags in the control
register DC: Display Enable (DE), All-Pixel-ON
(APO) and Inverse (PXV). DE has the overriding
effect over PXV and APO.
D
Display Enable is controlled by the Set Display
ON command. When DE is set to OFF (logic “0”),
both column and row drivers will become idle and
the chip will put itself into Sleep Mode to
conserve power.
When the DE is set to ON, the chip will first exit
from Sleep mode by restoring the power (V
V
row drivers will become active.
A
When set, this flag will force all column drivers to
output On signals, disregarding the data stored in
the display buffer.
This flag has no effect when Display Enable is
OFF and it has no effect on data stored in RAM.
I
When this flag set to ON, column drivers will
output the inverse of the value it received from
the display buffer RAM. This flag has no impact
on data stored in RAM.
NVERSE
ISPLAY
ISPLAY
D
LL
etc.). When the power is restored, column and
P
IXELS
E
C
(PXV)
NABLE
ONTROLS
O
N
(APO)
(DE)
65x102 Matrix LCD Controller-Drivers
UC1602I
LCD
,
11