msm9810 Oki Semiconductor, msm9810 Datasheet - Page 18
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msm9810
Manufacturer Part Number
msm9810
Description
8-channel Mixing Oki Adpcm Type Voice Synthesis Lsi
Manufacturer
Oki Semiconductor
Datasheet
1.MSM9810.pdf
(32 pages)
¡ Semiconductor
signals. These two types are selected by the NCR/BUSY pin. When the NCR/BUSY pin is at “H”
level, NCR is output, and when at “L” level, BUSY is output.
of each channel, and the WR signal input is enabled at “H” level.
S0 pins and D3/SR3-D0/SR0 pins in serial input interface by control of RD. Table 8-1 shows the
relationship between D7-D0 and channels, and Figure 8-1 shows read timing in the parallel input
interface.
8. Channel Status
The channel status is output from D7-D0.
There are two types of signals to be output as channel status: BUSYn (n = 1-8) signals and NCRn
The NCR signal is the command and subcommand input status signal (Next Command Request)
The BUSY signal outputs “L” level while each channel is executing voice synthesis.
Each channel status signal is output from D7-D0 pins in parallel input interface, and from D5/
In serial input interface, serial output from D5/SO pins by control of CS and RD, and D3/SR3-
D0/SR0 parallel output (constantly output) can be selected.
For serial output from D5/SO pin, D7-D0, shown in Table 8-1, are output from MSB in serial at
the rise of the SI pin when the RD pin is at “L” level.
Figure 8-2 shows this timing.
D7 - D0(I/O)
RD(I)
Table 8-1 Correspondence between D7-D0 and channels
Data bus
Corresponding channel
Figure 8-1 Read timing in parallel input interface
t
DRE
CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1
t
D7
RR
D6
D5
Data out Valid
D4
D3
D2
t
D1
DRF
D0
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