msm7542 Oki Semiconductor, msm7542 Datasheet - Page 7
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msm7542
Manufacturer Part Number
msm7542
Description
Single Rail Codec
Manufacturer
Oki Semiconductor
Datasheet
1.MSM7542.pdf
(20 pages)
¡ Semiconductor
DG
Ground for the digital signal circuits.
This ground is separate from the analog signal ground. The DG pin must be connected to the AG
pin on the printed circuit board to make a common analog ground.
PDN
Power down control signal.
A logic "0" level drives both transmit and receive circuits to a power down state.
PCMOUT
PCM signal output.
The PCM output signal is output from MSD in a sequential order, synchronizing with the rising
edge of the BCLOCK signal.
MSD may be output at the rising edge of the XSYNC signal, based on the timing between
BCLOCK and XSYNC.
This pin is in a high impedance state except during 8-bit PCM output. It is also in a high
impedance state during power saving or power down modes.
A pull-up resistor must be connected to this pin because its output is configured as an open drain.
This device is compatible with the ITU-T recommendation on coding law and output coding
format.
The MSM7542(A-law) outputs the character signal, inverting the even bits.
Input/Output Level
+Full scale
–Full scale
+0
–0
MSD
1 0 0 0
1 1 1 1
0 1 1 1
0 0 0 0
MSM7541 (m-law)
0 0 0 0
1 1 1 1
1 1 1 1
0 0 0 0
PCMIN/PCMOUT
MSD
1 0 1 0
1 1 0 1
0 1 0 1
0 0 1 0
MSM7542 (A-law)
MSM7541/7542
1 0 1 0
0 1 0 1
0 1 0 1
1 0 1 0
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