msm7718-01 Oki Semiconductor, msm7718-01 Datasheet - Page 25
![no-image](/images/no-image-200.jpg)
msm7718-01
Manufacturer Part Number
msm7718-01
Description
Echo Canceler With Adpcm Codec
Manufacturer
Oki Semiconductor
Datasheet
1.MSM7718-01.pdf
(38 pages)
- Current page: 25 of 38
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¡ Semiconductor
(3) CR2 (Setting of PCM I/O multiple control)
B7 ... ON or OFF of the PCM signal of the transmitter side of the PCM CODEC (PCMPCO pin)
B6 ... ON or OFF of the PCM signal of the receiver side of the PCM CODEC (PCMPCI pin)
B5, 4, 3 .... PCM I/O multiple timing control (PCMLNI and PCMLNO pins) of the line echo canceler
B2, 1, 0 .... PCM I/O multiple timing control (PCMACI and PCMACO pins) of the line echo canceler
Note : When bits B5 to B3 or B2 to B0 are all zeros, the internal process inputs a PCM idle pattern.
CR2
Initial value
0: ON 1: OFF
When this bit is “1” (OFF), the PCMPCO pin transmits a PCM idle pattern.
0: ON 1: OFF
When this bit is “1” (OFF), the PCMPCI pin receives a PCM idle pattern.
In this case, the outputs are all in high impedance state for all time slots.
(see Table 2)
(see Table 2)
PCM PCO
MUTE
B7
0
Table 2 PCM Multiple Timing Control Table
(
B5
B2
0
0
0
0
1
1
1
1
PCM PCI
MUTE
B6
0
B4
B1
0
0
1
1
0
0
1
1
B3
B0
PCM LN
0
1
0
1
0
1
0
1
SEL2
B5
0
)
Corresponding time slot
PCM LN
SEL1
B4
0
None
1
2
3
4
5
6
7
PCM LN
SEL0
B3
0
PCM AC
SEL2
B2
0
PCM AC
SEL1
B1
0
MSM7718-01
PCM AC
SEL0
25/38
B0
0
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