msm7715 Oki Semiconductor, msm7715 Datasheet - Page 10

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msm7715

Manufacturer Part Number
msm7715
Description
Multi-function Telecommunication Lsi
Manufacturer
Oki Semiconductor
Datasheet
¡ Semiconductor
TIMING DIAGRAM
When DTMF is received
t
t
t
t
t
t
t
t
AIN signal
DT1 to 4
SP
S
I
P
B
SP
C
G1n
D
: Tone time for detect
: Tone time for no detect
: Interdigit pause time
: Acceptable drop out time
: SP delay time
: Signal repetition time
: Output delay time (n: 1 or 2)
: Output trailing edge delay time
When the input signal duration is t
When the input signal duration is t
DT4 and SP is not output.
When there is no input signal for t
DT1 to DT4 and SP are not reset even though a no-signal state for t
(momentary no-signal) occurs during signal receiving. The t
the received signals are output. (SP="1")
Against the DT1 to DT4 output, SP is output after a delay of t
to DT4 at the rising edge of SP.
For normal receiving, set the signal repetition time to t
Against the appearance of the input signal, DT1 to DT4 are outputs after a delay of
t
Against the stop of the input signal, DT1 to DT4 and SP stop outputting after a delay
of t
G1n
t
I
D
.
.
t
G
Figure 1 DTMF Receive Timing
t
SP
t
S
t
C
P
I
S
t
or less, this input signal is ignored and DT1 to
or more, DT1 to DT4 and SP are reset.
D
or more, receiving is normally done.
t
P
C
or more.
SP
. Therefore, latch DT1
B
t
B
is applicable while
MSM7715
B
or less
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